From 626e8e58bb6ffd24279d0e5e2689f54405d2ae42 Mon Sep 17 00:00:00 2001 From: OBattler Date: Fri, 17 Sep 2021 02:54:19 +0200 Subject: [PATCH] Implemented a PIIX register written to by the ZAPPA that is officially reserved on PIIX (but otherwise exists on PIIX3). --- src/chipset/intel_piix.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/chipset/intel_piix.c b/src/chipset/intel_piix.c index a694da235..aa91c2fd5 100644 --- a/src/chipset/intel_piix.c +++ b/src/chipset/intel_piix.c @@ -528,6 +528,8 @@ piix_write(int func, int addr, uint8_t val, void *priv) case 0xab: if (dev->type == 3) fregs[addr] &= (val & 0x01); + else if (dev->type < 3) + fregs[addr] = val; break; case 0xb0: if (dev->type == 4)