From d30ad04a88b897597fe036579c7aff109858bec9 Mon Sep 17 00:00:00 2001 From: OBattler Date: Tue, 24 Aug 2021 21:11:00 +0200 Subject: [PATCH] UMC UM88xx fixes, ALi M1429 documentation, and added the DataExpert 386SX, PC Chips M919, Samsung SPC7700P-LW, and Acrosser AR-B1423C. Also renamed the ALi M1429G AMI WinBIOS 486 to Kaimei 486. --- src/chipset/ali1429.c | 66 ++++++++++++++++-- src/chipset/umc_8886.c | 62 +++++++++++------ src/chipset/umc_hb4.c | 20 ++++-- src/include/86box/machine.h | 6 +- src/machine/m_at_286_386sx.c | 30 +++++++-- src/machine/m_at_386dx_486.c | 127 ++++++++++++++++++++++++++++++----- src/machine/machine_table.c | 29 +++++--- 7 files changed, 277 insertions(+), 63 deletions(-) diff --git a/src/chipset/ali1429.c b/src/chipset/ali1429.c index 2ccddc1be..b96ec7896 100644 --- a/src/chipset/ali1429.c +++ b/src/chipset/ali1429.c @@ -8,15 +8,71 @@ * * Implementation of the ALi M1429 chipset. * - * Note: This chipset has no datasheet, everything were done via - * reverse engineering the BIOS of various machines using it. + * Note: This chipset has no datasheet, everything were done via + * reverse engineering the BIOS of various machines using it. * - * Authors: Tiseno100 - * - * Copyright 2020 Tiseno100 + * Authors: Tiseno100, + * Miran Grca, * + * Copyright 2020,2021 Tiseno100. + * Copyright 2021,2021 Miran Grca. */ +/* + ALi M1429/M1429G Configuration Registers + + Notes: Incorporated sometimes with a M1435 PCI-to-VLB Bridge + M1429G is just a 1429 with Green Functionality + SMM in it's entirety needs more research + + Warning: Register documentation may be inaccurate! + + Register 03h: Write C5h to unlock the configuration registers + + Register 10h & 11h: DRAM Bank Configuration + + Register 12h: + Bit 2: Memory Remapping Enable (128KB) + + Register 13h: + Bit 7: Shadow RAM Enable for F8000-FFFFF + Bit 6: Shadow RAM Enable for F0000-F7FFF + Bit 5: Shadow RAM Enable for E8000-FFFFF + Bit 4: Shadow RAM Enable for E0000-F7FFF + Bit 3: Shadow RAM Enable for D8000-FFFFF + Bit 2: Shadow RAM Enable for D0000-F7FFF + Bit 1: Shadow RAM Enable for C8000-FFFFF + Bit 0: Shadow RAM Enable for C0000-F7FFF + + Register 14h: + Bit 1: Shadow RAM Write for Enabled Segments + Bit 0: Shadow RAM Read for Enabled Segments + + Register 18h: + Bit 6-5-4 (Cache Size) + 0 0 0 32KB + 0 0 1 128KB + 0 1 0 256KB + 0 1 1 512KB + 1 0 0 64KB + 1 0 1 256KB + 1 1 0 512KB + 1 1 1 1MB + + Bit 1: L2 Cache Enable + + Register 20h: + Bits 2-1-0: Bus Clock Speed + 0 0 0: 7.1519Mhz (ATCLK2) + 0 0 1: CLK2IN/4 + 0 1 0: CLK2IN/5 + 0 1 1: CLK2IN/6 + 1 0 0: CLK2IN/8 + 1 0 1: CLK2IN/10 + 1 1 0: CLK2IN/12 + +*/ + #include #include #include diff --git a/src/chipset/umc_8886.c b/src/chipset/umc_8886.c index b3e721e9f..a8962030b 100644 --- a/src/chipset/umc_8886.c +++ b/src/chipset/umc_8886.c @@ -12,8 +12,10 @@ * reverse engineering the BIOS of various machines using it. * * Authors: Tiseno100, + * Miran Grca, * * Copyright 2021 Tiseno100. + * Copyright 2021 Miran Grca. */ /* @@ -35,9 +37,9 @@ Bits 7-4 PCI IRQ for INTD Bits 3-0 PCI IRQ for INTC - Function 0 Register 46: - Bit 7: PMU Trigger(1: By IRQ/0: By SMI) - Bit 6: IRQ SMI Request (1: IRQ 10) (Supposedly 0 according to Phoenix is IRQ 15 but doesn't seem to make sense) + Function 0 Register 46 (corrected by Miran Grca): + Bit 7: IRQ SMI Request (1: IRQ 15, 0: IRQ 10) + Bit 6: PMU Trigger(1: By IRQ/0: By SMI) Function 0 Register 56: Bit 1-0 ISA Bus Speed @@ -45,9 +47,17 @@ 0 1 PCICLK/4 1 0 PCICLK/2 - Function 0 Register A3: + Function 0 Register A2 - non-software SMI# status register + (documented by Miran Grca): + Bit 4: I set, graphics card goes into sleep mode + This register is most likely R/WC + + Function 0 Register A3 (added more details by Miran Grca): Bit 7: Unlock SMM - Bit 6: Software SMI trigger + Bit 6: Software SMI trigger (also doubles as software SMI# status register, + cleared by writing a 0 to it - see the handler used by Phoenix BIOS'es): + If Function 0 Register 46 Bit 6 is set, it raises the specified IRQ (15 + or 10) instead. Function 0 Register A4: Bit 0: Host to PCI Clock (1: 1 by 1/0: 1 by half) @@ -78,6 +88,9 @@ #include <86box/chipset.h> +#define IDE_BIT 0x01 + + #ifdef ENABLE_UMC_8886_LOG int umc_8886_do_log = ENABLE_UMC_8886_LOG; @@ -113,10 +126,10 @@ umc_8886_log(const char *fmt, ...) typedef struct umc_8886_t { - uint8_t pci_conf_sb[2][256]; /* PCI Registers */ + uint8_t max_func, /* Last function number */ + pci_conf_sb[2][256]; /* PCI Registers */ uint16_t sb_id; /* Southbridge Revision */ int has_ide; /* Check if Southbridge Revision is AF or F */ - } umc_8886_t; @@ -138,7 +151,7 @@ umc_8886_write(int func, int addr, uint8_t val, void *priv) { umc_8886_t *dev = (umc_8886_t *)priv; - switch (func) { + if (func <= dev->max_func) switch (func) { case 0: /* PCI to ISA Bridge */ umc_8886_log("UM8886: dev->regs[%02x] = %02x POST %02x\n", addr, val, inb(0x80)); @@ -171,11 +184,8 @@ umc_8886_write(int func, int addr, uint8_t val, void *priv) break; case 0x46: + /* Bit 6 seems to be the IRQ/SMI# toggle, 1 = IRQ, 0 = SMI#. */ dev->pci_conf_sb[func][addr] = val; - - if (val & 0x40) - picint(1 << ((val & 0x80) ? 15 : 10)); - break; case 0x47: @@ -208,17 +218,25 @@ umc_8886_write(int func, int addr, uint8_t val, void *priv) case 0x70 ... 0x76: case 0x80: case 0x81: case 0x90 ... 0x92: - case 0xa0 ... 0xa2: + case 0xa0 ... 0xa1: dev->pci_conf_sb[func][addr] = val; break; + case 0xa2: + dev->pci_conf_sb[func][addr] &= ~val; + break; + case 0xa3: + /* SMI Provocation (Bit 7 Enable SMM + Bit 6 Software SMI) */ + if (((val & 0xc0) == 0xc0) && !(dev->pci_conf_sb[0][0xa3] & 0x40)) { + if (dev->pci_conf_sb[0][0x46] & 0x40) + picint(1 << ((dev->pci_conf_sb[0][0x46] & 0x80) ? 15 : 10)); + else + smi_line = 1; + dev->pci_conf_sb[0][0xa3] |= 0x04; + } + dev->pci_conf_sb[func][addr] = val; - - /* SMI Provocation (Bit 7 Enable SMM + Bit 6 Software SMI */ - if (((dev->pci_conf_sb[0][0xa3] >> 6) == 3) && !in_smm) - smi_line = 1; - break; case 0xa4: @@ -259,8 +277,12 @@ static uint8_t umc_8886_read(int func, int addr, void *priv) { umc_8886_t *dev = (umc_8886_t *)priv; + uint8_t ret = 0xff; - return dev->pci_conf_sb[func][addr]; + if (func <= dev->max_func) + ret = dev->pci_conf_sb[func][addr]; + + return ret; } @@ -339,6 +361,8 @@ umc_8886_init(const device_t *info) if (HAS_IDE) device_add(&ide_pci_2ch_device); + dev->max_func = (HAS_IDE) ? 1 : 0; + /* Get the Southbridge Revision */ SB_ID = info->local; diff --git a/src/chipset/umc_hb4.c b/src/chipset/umc_hb4.c index 136fc03a0..ca544f7ac 100644 --- a/src/chipset/umc_hb4.c +++ b/src/chipset/umc_hb4.c @@ -15,8 +15,10 @@ * around the web. * * Authors: Tiseno100, + * Miran Grca, * * Copyright 2021 Tiseno100. + * Copyright 2021 Miran Grca. */ /* @@ -81,11 +83,9 @@ Register 58h & 59h: DRAM Bank 1 Configuration Register 60: - Bit 5-4: SMRAM Position(Lot's of uncertainty to those bits) - 0 0 A0000 to E0000 - 1 0 A0000 to ????? (Phoenix uses it to no avail) - - Bit 0: SMRAM Local Access Enable + Bit 5: If set and SMRAM is enabled, data cycles go to PCI and code cycles go to DRAM + Bit 0: SMRAM Local Access Enable - if set, SMRAM is also enabled outside SMM + SMRAM appears to always be enabled in SMM, and always set to A0000-BFFFF. */ #include @@ -165,7 +165,17 @@ hb4_smram(hb4_t *dev) { smram_disable_all(); + /* Bit 0, if set, enables SMRAM access outside SMM. SMRAM appears to be always enabled + in SMM, and is always set to A0000-BFFFF. */ smram_enable(dev->smram, 0x000a0000, 0x000a0000, 0x20000, dev->pci_conf[0x60] & 0x01, 1); + + /* Bit 5 seems to set data to go to PCI and code to DRAM. The Samsung SPC7700P-LW uses + this. */ + if (dev->pci_conf[0x60] & 0x20) { + if (dev->pci_conf[0x60] & 0x01) + mem_set_mem_state_smram_ex(0, 0x000a0000, 0x20000, 0x02); + mem_set_mem_state_smram_ex(1, 0x000a0000, 0x20000, 0x02); + } } diff --git a/src/include/86box/machine.h b/src/include/86box/machine.h index a805dc4ba..cd3cce9b8 100644 --- a/src/include/86box/machine.h +++ b/src/include/86box/machine.h @@ -277,6 +277,7 @@ extern int machine_at_shuttle386sx_init(const machine_t *); extern int machine_at_adi386sx_init(const machine_t *); extern int machine_at_cmdsl386sx16_init(const machine_t *); extern int machine_at_cmdsl386sx25_init(const machine_t *); +extern int machine_at_dataexpert386sx_init(const machine_t *); extern int machine_at_spc6033p_init(const machine_t *); extern int machine_at_wd76c10_init(const machine_t *); extern int machine_at_arb1374_init(const machine_t *); @@ -288,7 +289,7 @@ extern int machine_at_prox1332_init(const machine_t *); extern int machine_at_awardsx_init(const machine_t *); -extern int machine_at_pc916sx_init(const machine_t *); +extern int machine_at_pc916sx_init(const machine_t *); #ifdef EMU_DEVICE_H extern const device_t *at_ama932j_get_device(void); @@ -366,6 +367,7 @@ extern int machine_at_sbc_490_init(const machine_t *); extern int machine_at_tf_486_init(const machine_t *); extern int machine_at_itoxstar_init(const machine_t *); +extern int machine_at_arb1423c_init(const machine_t *); extern int machine_at_arb1479_init(const machine_t *); extern int machine_at_pcm9340_init(const machine_t *); extern int machine_at_pcm5330_init(const machine_t *); @@ -374,6 +376,8 @@ extern int machine_at_ecs486_init(const machine_t *); extern int machine_at_hot433_init(const machine_t *); extern int machine_at_atc1415_init(const machine_t *); extern int machine_at_actionpc2600_init(const machine_t *); +extern int machine_at_m919_init(const machine_t *); +extern int machine_at_spc7700p_lw_init(const machine_t *); #ifdef EMU_DEVICE_H extern const device_t *at_acera1g_get_device(void); diff --git a/src/machine/m_at_286_386sx.c b/src/machine/m_at_286_386sx.c index b4d5b4ed6..c2f9a433d 100644 --- a/src/machine/m_at_286_386sx.c +++ b/src/machine/m_at_286_386sx.c @@ -590,14 +590,17 @@ machine_at_cmdsl386sx16_init(const machine_t *model) static void -machine_at_scamp_common_init(const machine_t *model) +machine_at_scamp_common_init(const machine_t *model, int is_ps2) { machine_at_common_ide_init(model); - device_add(&keyboard_ps2_ami_device); + if (is_ps2) + device_add(&keyboard_ps2_ami_device); + else + device_add(&keyboard_at_ami_device); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_at_device); device_add(&vlsi_scamp_device); } @@ -624,7 +627,24 @@ machine_at_cmdsl386sx25_init(const machine_t *model) if (gfxcard == VID_INTERNAL) device_add(&gd5402_onboard_device); - machine_at_scamp_common_init(model); + machine_at_scamp_common_init(model, 1); + + return ret; +} + + +int +machine_at_dataexpert386sx_init(const machine_t *model) +{ + int ret; + + ret = bios_load_linear("roms/machines/dataexpert386sx/5e9f20e5ef967717086346.BIN", + 0x000f0000, 65536, 0); + + if (bios_only || !ret) + return ret; + + machine_at_scamp_common_init(model, 0); return ret; } @@ -651,7 +671,7 @@ machine_at_spc6033p_init(const machine_t *model) if (gfxcard == VID_INTERNAL) device_add(&ati28800k_spc6033p_device); - machine_at_scamp_common_init(model); + machine_at_scamp_common_init(model, 1); return ret; } diff --git a/src/machine/m_at_386dx_486.c b/src/machine/m_at_386dx_486.c index cf27a999d..2068b3c88 100644 --- a/src/machine/m_at_386dx_486.c +++ b/src/machine/m_at_386dx_486.c @@ -412,7 +412,7 @@ machine_at_acera1g_init(const machine_t *model) return ret; machine_at_common_init(model); - device_add(&ali1429_device); + device_add(&ali1429g_device); if (gfxcard == VID_INTERNAL) device_add(&gd5428_onboard_device); @@ -482,11 +482,14 @@ machine_at_decpc_lpv_init(const machine_t *model) } static void -machine_at_ali1429_common_init(const machine_t *model) +machine_at_ali1429_common_init(const machine_t *model, int is_green) { machine_at_common_ide_init(model); - device_add(&ali1429_device); + if (is_green) + device_add(&ali1429g_device); + else + device_add(&ali1429_device); device_add(&keyboard_at_ami_device); @@ -506,7 +509,7 @@ machine_at_ali1429_init(const machine_t *model) if (bios_only || !ret) return ret; - machine_at_ali1429_common_init(model); + machine_at_ali1429_common_init(model, 0); return ret; } @@ -523,7 +526,7 @@ machine_at_winbios1429_init(const machine_t *model) if (bios_only || !ret) return ret; - machine_at_ali1429_common_init(model); + machine_at_ali1429_common_init(model, 1); return ret; } @@ -1450,6 +1453,34 @@ machine_at_itoxstar_init(const machine_t *model) } +int +machine_at_arb1423c_init(const machine_t *model) +{ + int ret; + + ret = bios_load_linear("roms/machines/arb1423c/A1423C.v12", + 0x000c0000, 262144, 0); + + if (bios_only || !ret) + return ret; + + machine_at_common_init(model); + + pci_init(PCI_CONFIG_TYPE_1); + pci_register_slot(0x0B, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0); + pci_register_slot(0x0C, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0); + pci_register_slot(0x1F, PCI_CARD_NORMAL, 1, 0, 0, 0); + pci_register_slot(0x1E, PCI_CARD_NORMAL, 2, 3, 4, 1); + pci_register_slot(0x1D, PCI_CARD_NORMAL, 3, 4, 1, 2); + device_add(&w83977f_device); + device_add(&keyboard_ps2_ami_pci_device); + device_add(&stpc_consumer2_device); + device_add(&winbond_flash_w29c020_device); + + return ret; +} + + int machine_at_arb1479_init(const machine_t *model) { @@ -1552,10 +1583,10 @@ machine_at_ecs486_init(const machine_t *model) pci_init(PCI_CONFIG_TYPE_1); pci_register_slot(0x10, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0); pci_register_slot(0x12, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4); - pci_register_slot(0x0f, PCI_CARD_IDE, 0, 0, 0, 0); - pci_register_slot(0x0c, PCI_CARD_NORMAL, 1, 2, 3, 4); - pci_register_slot(0x0d, PCI_CARD_NORMAL, 2, 3, 4, 1); - pci_register_slot(0x0e, PCI_CARD_NORMAL, 3, 4, 1, 2); + pci_register_slot(0x0F, PCI_CARD_IDE, 0, 0, 0, 0); + pci_register_slot(0x0C, PCI_CARD_NORMAL, 1, 2, 3, 4); + pci_register_slot(0x0D, PCI_CARD_NORMAL, 2, 3, 4, 1); + pci_register_slot(0x0E, PCI_CARD_NORMAL, 3, 4, 1, 2); device_add(&umc_hb4_device); device_add(&umc_8886f_device); @@ -1584,10 +1615,10 @@ machine_at_hot433_init(const machine_t *model) pci_init(PCI_CONFIG_TYPE_1); pci_register_slot(0x10, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0); pci_register_slot(0x12, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4); - pci_register_slot(0x0c, PCI_CARD_NORMAL, 1, 2, 3, 4); - pci_register_slot(0x0d, PCI_CARD_NORMAL, 4, 1, 2, 3); - pci_register_slot(0x0e, PCI_CARD_NORMAL, 3, 4, 1, 2); - pci_register_slot(0x0f, PCI_CARD_NORMAL, 2, 3, 4, 1); + pci_register_slot(0x0C, PCI_CARD_NORMAL, 1, 2, 3, 4); + pci_register_slot(0x0D, PCI_CARD_NORMAL, 4, 1, 2, 3); + pci_register_slot(0x0E, PCI_CARD_NORMAL, 3, 4, 1, 2); + pci_register_slot(0x0F, PCI_CARD_NORMAL, 2, 3, 4, 1); device_add(&umc_hb4_device); device_add(&umc_8886af_device); @@ -1615,7 +1646,7 @@ machine_at_atc1415_init(const machine_t *model) pci_init(PCI_CONFIG_TYPE_1); pci_register_slot(0x10, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0); pci_register_slot(0x12, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4); - pci_register_slot(0x0c, PCI_CARD_NORMAL, 1, 2, 3, 4); + pci_register_slot(0x0C, PCI_CARD_NORMAL, 1, 2, 3, 4); pci_register_slot(0x13, PCI_CARD_NORMAL, 4, 1, 2, 3); pci_register_slot(0x14, PCI_CARD_NORMAL, 3, 4, 1, 2); @@ -1646,10 +1677,10 @@ machine_at_actionpc2600_init(const machine_t *model) pci_init(PCI_CONFIG_TYPE_1); pci_register_slot(0x10, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0); pci_register_slot(0x12, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4); - pci_register_slot(0x0c, PCI_CARD_NORMAL, 1, 2, 3, 4); - pci_register_slot(0x0d, PCI_CARD_NORMAL, 4, 1, 2, 3); - pci_register_slot(0x0e, PCI_CARD_NORMAL, 3, 4, 1, 2); - pci_register_slot(0x0f, PCI_CARD_NORMAL, 2, 3, 4, 1); + pci_register_slot(0x0C, PCI_CARD_NORMAL, 1, 2, 3, 4); + pci_register_slot(0x0D, PCI_CARD_NORMAL, 4, 1, 2, 3); + pci_register_slot(0x0E, PCI_CARD_NORMAL, 3, 4, 1, 2); + pci_register_slot(0x0F, PCI_CARD_NORMAL, 2, 3, 4, 1); device_add(&umc_hb4_device); device_add(&umc_8886af_device); @@ -1659,3 +1690,63 @@ machine_at_actionpc2600_init(const machine_t *model) return ret; } + + +int +machine_at_m919_init(const machine_t *model) +{ + int ret; + + ret = bios_load_linear("roms/machines/m919/9190914s.rom", + 0x000e0000, 131072, 0); + + if (bios_only || !ret) + return ret; + + machine_at_common_init(model); + + pci_init(PCI_CONFIG_TYPE_1); + pci_register_slot(0x10, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0); + pci_register_slot(0x12, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4); + pci_register_slot(0x0C, PCI_CARD_NORMAL, 1, 2, 3, 4); + pci_register_slot(0x0D, PCI_CARD_NORMAL, 4, 1, 2, 3); + pci_register_slot(0x0E, PCI_CARD_NORMAL, 3, 4, 1, 2); + + device_add(&umc_hb4_device); + device_add(&umc_8886af_device); + device_add(&um8669f_device); + device_add(&sst_flash_29ee010_device); + device_add(&keyboard_at_ami_device); + + return ret; +} + + +int +machine_at_spc7700p_lw_init(const machine_t *model) +{ + int ret; + + ret = bios_load_linear("roms/machines/spc7700p-lw/77LW13FH.P24", + 0x000e0000, 131072, 0); + + if (bios_only || !ret) + return ret; + + machine_at_common_init(model); + + pci_init(PCI_CONFIG_TYPE_1); + pci_register_slot(0x10, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0); + pci_register_slot(0x12, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4); + pci_register_slot(0x0C, PCI_CARD_NORMAL, 2, 3, 4, 1); + pci_register_slot(0x0D, PCI_CARD_NORMAL, 1, 2, 3, 4); + pci_register_slot(0x0E, PCI_CARD_NORMAL, 3, 4, 1, 2); + + device_add(&umc_hb4_device); + device_add(&umc_8886af_device); + device_add(&fdc37c665_device); + device_add(&intel_flash_bxt_device); + device_add(&keyboard_at_ami_device); + + return ret; +} diff --git a/src/machine/machine_table.c b/src/machine/machine_table.c index b458b5a5f..77c5fbea4 100644 --- a/src/machine/machine_table.c +++ b/src/machine/machine_table.c @@ -99,11 +99,7 @@ const machine_type_t machine_types[] = { Write Input Port, same as on AMIKey-3. Machines to remove: - - Hedaka HED-919; - - A-Trend ATC-1415; - - ECS Elite UM8810PAIO; - - Shuttle HOT-433A; - - Azza 5IVG (if a more interesting machine with Prime3C is found). + - Hedaka HED-919. */ @@ -276,6 +272,10 @@ const machine_t machines[] = { the IBM PS/2 Type 1 KBC firmware unless evidence emerges of any proprietary commands. */ { "[SCAMP] Commodore SL386SX-25", "cmdsl386sx25", MACHINE_TYPE_386SX, CPU_PKG_386SX, 0, 0, 0, 0, 0, 0, 0, MACHINE_AT | MACHINE_BUS_PS2 | MACHINE_IDE | MACHINE_VIDEO, 1024, 8192, 512, 127, machine_at_cmdsl386sx25_init, at_cmdsl386sx25_get_device }, + /* The closest BIOS string I find to this one's, differs only in one part, + and ends in -8, so I'm going to assume that this, too, has an AMI '8' + (AMI Keyboard BIOS Plus) KBC firmware. */ + { "[SCAMP] DataExpert 386SX", "dataexpert386sx", MACHINE_TYPE_386SX, CPU_PKG_386SX, 0, 10000000, 25000000, 0, 0, 0, 0, MACHINE_AT, 1024, 16384, 1024, 127, machine_at_dataexpert386sx_init, NULL }, /* Has IBM PS/2 Type 1 KBC firmware. */ { "[SCAMP] Samsung SPC-6033P", "spc6033p", MACHINE_TYPE_386SX, CPU_PKG_386SX, 0, 0, 0, 0, 0, 0, 0, MACHINE_AT | MACHINE_BUS_PS2 | MACHINE_IDE | MACHINE_VIDEO, 2048, 12288, 2048, 127, machine_at_spc6033p_init, at_spc6033p_get_device }, /* Has an unknown AMI KBC firmware, I'm going to assume 'F' until a @@ -297,6 +297,7 @@ const machine_t machines[] = { { "[ACC 2168] AMI 386DX clone", "acc386", MACHINE_TYPE_386DX, CPU_PKG_386DX, 0, 0, 0, 0, 0, 0, 0, MACHINE_AT, 1024, 16384, 1024, 127, machine_at_acc386_init, NULL }, /* Has an AMI Keyboard BIOS PLUS KBC firmware ('8'). */ { "[C&T 386] ECS 386/32", "ecs386", MACHINE_TYPE_386DX, CPU_PKG_386DX, 0, 0, 0, 0, 0, 0, 0, MACHINE_AT, 1024, 16384, 1024, 127, machine_at_ecs386_init, NULL }, + /* Has IBM AT KBC firmware. */ { "[C&T 386] Samsung SPC-6000A", "spc6000a", MACHINE_TYPE_386DX, CPU_PKG_386DX, 0, 0, 0, 0, 0, 0, 0, MACHINE_AT | MACHINE_IDE, 1024, 32768, 1024, 127, machine_at_spc6000a_init, NULL }, /* Uses Compaq KBC firmware. */ { "[ISA] Compaq Portable III (386)", "portableiii386", MACHINE_TYPE_386DX, CPU_PKG_386DX, 0, 0, 0, 0, 0, 0, 0, MACHINE_AT | MACHINE_IDE | MACHINE_VIDEO, 1024, 14336, 1024, 127, machine_at_portableiii386_init, at_cpqiii_get_device }, @@ -366,7 +367,7 @@ const machine_t machines[] = { { "[ALi M1429G] Acer A1G", "acera1g", MACHINE_TYPE_486_S2, CPU_PKG_SOCKET3, 0, 0, 0, 0, 0, 0, 0, MACHINE_AT | MACHINE_BUS_PS2 | MACHINE_IDE_DUAL | MACHINE_VIDEO, 4096, 36864, 1024, 127, machine_at_acera1g_init, at_acera1g_get_device }, /* There are two similar BIOS strings with -H, and one with -U, so I'm going to give it an AMIKey H KBC firmware. */ - { "[ALi M1429G] AMI WinBIOS 486", "win486", MACHINE_TYPE_486_S2, CPU_PKG_SOCKET3, 0, 0, 0, 0, 0, 0, 0, MACHINE_VLB | MACHINE_IDE, 1024, 32768, 1024, 127, machine_at_winbios1429_init, NULL }, + { "[ALi M1429G] Kaimei 486", "win486", MACHINE_TYPE_486_S2, CPU_PKG_SOCKET3, 0, 0, 0, 0, 0, 0, 0, MACHINE_VLB | MACHINE_IDE, 1024, 32768, 1024, 127, machine_at_winbios1429_init, NULL }, /* Uses an Intel KBC with Phoenix MultiKey KBC firmware. */ { "[SiS 461] DEC DECpc LPV", "decpc_lpv", MACHINE_TYPE_486_S2, CPU_PKG_SOCKET3, 0, 0, 0, 0, 0, 0, 0, MACHINE_AT | MACHINE_BUS_PS2 | MACHINE_IDE_DUAL | MACHINE_VIDEO, 1024, 32768, 1024, 127, machine_at_decpc_lpv_init, NULL }, /* Uses an NEC 90M002A (UPD82C42C, 8042 clone) with unknown firmware. */ @@ -446,13 +447,18 @@ const machine_t machines[] = { of type 'H'. */ { "[SiS 496] Zida Tomato 4DP", "4dps", MACHINE_TYPE_486_S3, CPU_PKG_SOCKET3, 0, 0, 0, 0, 0, 0, 0, MACHINE_PCI | MACHINE_IDE_DUAL, 1024, 261120, 1024, 255, machine_at_4dps_init, NULL }, /* This has the UMC 88xx on-chip KBC. */ - { "[UMC 8881] A-Trend ATC-1415", "atc1415", MACHINE_TYPE_486_S3, CPU_PKG_SOCKET3, 0, 0, 0, 0, 0, 0, 0, MACHINE_PCI | MACHINE_IDE_DUAL, 1024, 65536, 1024, 255, machine_at_atc1415_init, NULL }, + { "[UMC 888x] A-Trend ATC-1415", "atc1415", MACHINE_TYPE_486_S3, CPU_PKG_SOCKET3, 0, 0, 0, 0, 0, 0, 0, MACHINE_PCI | MACHINE_IDE_DUAL, 1024, 65536, 1024, 255, machine_at_atc1415_init, NULL }, /* This has an AMIKey-2, which is an updated version of type 'H'. */ - { "[UMC 8881] ECS Elite UM8810PAIO", "ecs486", MACHINE_TYPE_486_S3, CPU_PKG_SOCKET3, 0, 0, 0, 0, 0, 0, 0, MACHINE_PCI | MACHINE_IDE_DUAL, 1024, 131072, 1024, 255, machine_at_ecs486_init, NULL }, + { "[UMC 888x] ECS Elite UM8810PAIO", "ecs486", MACHINE_TYPE_486_S3, CPU_PKG_SOCKET3, 0, 0, 0, 0, 0, 0, 0, MACHINE_PCI | MACHINE_IDE_DUAL, 1024, 131072, 1024, 255, machine_at_ecs486_init, NULL }, /* Has AMIKey Z(!) KBC firmware. */ - { "[UMC 8881] Epson Action PC 2600", "actionpc2600", MACHINE_TYPE_486_S3, CPU_PKG_SOCKET3, 0, 0, 0, 0, 0, 0, 0, MACHINE_PCI | MACHINE_IDE_DUAL, 1024, 262144, 1024, 255, machine_at_actionpc2600_init, NULL }, + { "[UMC 888x] Epson Action PC 2600", "actionpc2600", MACHINE_TYPE_486_S3, CPU_PKG_SOCKET3, 0, 0, 0, 0, 0, 0, 0, MACHINE_PCI | MACHINE_IDE_DUAL, 1024, 262144, 1024, 255, machine_at_actionpc2600_init, NULL }, + /* This has the UMC 88xx on-chip KBC. All the copies of the BIOS string I can find, end in + in -H, so the UMC on-chip KBC likely emulates the AMI 'H' KBC firmware. */ + { "[UMC 888x] PC Chips M919", "m919", MACHINE_TYPE_486_S3, CPU_PKG_SOCKET3, 0, 0, 0, 0, 0, 0, 0, MACHINE_PCI | MACHINE_VLB | MACHINE_IDE_DUAL, 1024, 131072, 1024, 255, machine_at_m919_init, NULL }, + /* Has IBM PS/2 Type 1 KBC firmware. Uses a mysterious I/O port C05. */ + { "[UMC 888x] Samsung SPC7700P-LW", "spc7700p-lw", MACHINE_TYPE_486_S3, CPU_PKG_SOCKET3, 0, 0, 0, 0, 0, 0, 0, MACHINE_PCI | MACHINE_BUS_PS2 | MACHINE_IDE_DUAL, 1024, 131072, 1024, 255, machine_at_spc7700p_lw_init, NULL }, /* This has a Holtek KBC. */ - { "[UMC 8881] Shuttle HOT-433A", "hot433", MACHINE_TYPE_486_S3, CPU_PKG_SOCKET3, 0, 0, 0, 0, 0, 0, 0, MACHINE_PCI | MACHINE_IDE_DUAL, 1024, 262144, 1024, 255, machine_at_hot433_init, NULL }, + { "[UMC 888x] Shuttle HOT-433A", "hot433", MACHINE_TYPE_486_S3, CPU_PKG_SOCKET3, 0, 0, 0, 0, 0, 0, 0, MACHINE_PCI | MACHINE_IDE_DUAL, 1024, 262144, 1024, 255, machine_at_hot433_init, NULL }, /* Has a VIA VT82C406 KBC+RTC that likely has identical commands to the VT82C42N. */ { "[VIA VT82C496G] DFI G486VPA", "g486vpa", MACHINE_TYPE_486_S3, CPU_PKG_SOCKET3, 0, 0, 0, 0, 0, 0, 0, MACHINE_PCIV | MACHINE_IDE_DUAL, 1024, 131072, 1024, 255, machine_at_g486vpa_init, NULL }, /* Has a VIA VT82C42N KBC. */ @@ -463,6 +469,9 @@ const machine_t machines[] = { /* Has a Winbond W83977F Super I/O chip with on-chip KBC with AMIKey-2 KBC firmware. */ { "[STPC Client] ITOX STAR", "itoxstar", MACHINE_TYPE_486_MISC, CPU_PKG_STPC, 0, 66666667, 75000000, 0, 0, 1.0, 1.0, MACHINE_PCI | MACHINE_BUS_PS2 | MACHINE_IDE_DUAL, 8192, 131072, 8192, 255, machine_at_itoxstar_init, NULL }, + /* Has a Winbond W83977F Super I/O chip with on-chip KBC with AMIKey-2 KBC + firmware. */ + { "[STPC Consumer-II] Acrosser AR-B1423C", "arb1423c", MACHINE_TYPE_486_MISC, CPU_PKG_STPC, 0, 66666667, 66666667, 0, 0, 2.0, 2.0, MACHINE_PCI | MACHINE_BUS_PS2 | MACHINE_IDE_DUAL, 32768, 163840, 8192, 255, machine_at_arb1423c_init, NULL }, /* Has a Winbond W83977F Super I/O chip with on-chip KBC with AMIKey-2 KBC firmware. */ { "[STPC Consumer-II] Acrosser AR-B1479", "arb1479", MACHINE_TYPE_486_MISC, CPU_PKG_STPC, 0, 66666667, 66666667, 0, 0, 2.0, 2.0, MACHINE_PCI | MACHINE_BUS_PS2 | MACHINE_IDE_DUAL, 32768, 163840, 8192, 255, machine_at_arb1479_init, NULL },