citra-shitamoto-network/src/core/mem_map_funcs.cpp

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// Copyright 2014 Citra Emulator Project
// Licensed under GPLv2
// Refer to the license.txt file included.
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#include "common/common.h"
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#include "core/mem_map.h"
#include "core/hw/hw.h"
#include "hle/hle.h"
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namespace Memory {
/// Convert a physical address to virtual address
u32 _AddressPhysicalToVirtual(const u32 addr) {
// Our memory interface read/write functions assume virtual addresses. Put any physical address
// to virtual address translations here. This is obviously quite hacky... But we're not doing
// any MMU emulation yet or anything
if (((addr & 0xF0000000) == MEM_FCRAM_PADDR) && (addr < (MEM_FCRAM_PADDR_END))) {
return (addr & MEM_FCRAM_MASK) | MEM_FCRAM_VADDR;
}
return addr;
}
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template <typename T>
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inline void _Read(T &var, const u32 addr) {
// TODO: Figure out the fastest order of tests for both read and write (they are probably different).
// TODO: Make sure this represents the mirrors in a correct way.
// Could just do a base-relative read, too.... TODO
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const u32 vaddr = _AddressPhysicalToVirtual(addr);
// Memory allocated for HLE use that can be addressed from the emulated application
// The primary use of this is sharing a commandbuffer between the HLE OS (syscore) and the LLE
// core running the user application (appcore)
if (vaddr >= HLE::CMD_BUFFER_ADDR && vaddr < HLE::CMD_BUFFER_ADDR_END) {
HLE::Read<T>(var, vaddr);
// Hardware I/O register reads
// 0x10XXXXXX- is physical address space, 0x1EXXXXXX is virtual address space
} else if ((vaddr & 0xFF000000) == 0x10000000 || (vaddr & 0xFF000000) == 0x1E000000) {
HW::Read<T>(var, vaddr);
// FCRAM
} else if ((vaddr > MEM_FCRAM_VADDR) && (vaddr < MEM_FCRAM_VADDR_END)) {
var = *((const T*)&g_fcram[vaddr & MEM_FCRAM_MASK]);
/*else if ((vaddr & 0x3F800000) == 0x04000000) {
var = *((const T*)&m_pVRAM[vaddr & VRAM_MASK]);*/
} else {
_assert_msg_(MEMMAP, false, "unknown Read%d @ 0x%08X", sizeof(var) * 8, vaddr);
}
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}
template <typename T>
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inline void _Write(u32 addr, const T data) {
u32 vaddr = _AddressPhysicalToVirtual(addr);
// Memory allocated for HLE use that can be addressed from the emulated application
// The primary use of this is sharing a commandbuffer between the HLE OS (syscore) and the LLE
// core running the user application (appcore)
if (vaddr >= HLE::CMD_BUFFER_ADDR && vaddr < HLE::CMD_BUFFER_ADDR_END) {
HLE::Write<T>(vaddr, data);
// Hardware I/O register writes
// 0x10XXXXXX- is physical address space, 0x1EXXXXXX is virtual address space
} else if ((vaddr & 0xFF000000) == 0x10000000 || (vaddr & 0xFF000000) == 0x1E000000) {
HW::Write<T>(vaddr, data);
// ExeFS:/.code is loaded here:
} else if ((vaddr & 0xFFF00000) == 0x00100000) {
// TODO(ShizZy): This is dumb... handle correctly. From 3DBrew:
// http://3dbrew.org/wiki/Memory_layout#ARM11_User-land_memory_regions
// The ExeFS:/.code is loaded here, executables must be loaded to the 0x00100000 region when
// the exheader "special memory" flag is clear. The 0x03F00000-byte size restriction only
// applies when this flag is clear. Executables are usually loaded to 0x14000000 when the
// exheader "special memory" flag is set, however this address can be arbitrary.
*(T*)&g_fcram[vaddr & MEM_FCRAM_MASK] = data;
// FCRAM
} else if ((vaddr > MEM_FCRAM_VADDR) && (vaddr < MEM_FCRAM_VADDR_END)) {
*(T*)&g_fcram[vaddr & MEM_FCRAM_MASK] = data;
} else if ((vaddr & 0xFF000000) == 0x14000000) {
_assert_msg_(MEMMAP, false, "umimplemented write to GSP heap");
} else if ((vaddr & 0xFFF00000) == 0x1EC00000) {
_assert_msg_(MEMMAP, false, "umimplemented write to IO registers");
} else if ((vaddr & 0xFF000000) == 0x1F000000) {
_assert_msg_(MEMMAP, false, "umimplemented write to VRAM");
} else if ((vaddr & 0xFFF00000) == 0x1FF00000) {
_assert_msg_(MEMMAP, false, "umimplemented write to DSP memory");
} else if ((vaddr & 0xFFFF0000) == 0x1FF80000) {
_assert_msg_(MEMMAP, false, "umimplemented write to Configuration Memory");
} else if ((vaddr & 0xFFFFF000) == 0x1FF81000) {
_assert_msg_(MEMMAP, false, "umimplemented write to shared page");
// Error out...
} else {
_assert_msg_(MEMMAP, false, "unknown Write%d 0x%08X @ 0x%08X", sizeof(data) * 8,
data, vaddr);
}
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}
u8 *GetPointer(const u32 addr) {
const u32 vaddr = _AddressPhysicalToVirtual(addr);
// FCRAM
if ((vaddr > MEM_FCRAM_VADDR) && (vaddr < MEM_FCRAM_VADDR_END)) {
return g_fcram + (vaddr & MEM_FCRAM_MASK);
} else {
ERROR_LOG(MEMMAP, "Unknown GetPointer @ 0x%08x", vaddr);
return 0;
}
}
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u8 Read8(const u32 addr) {
u8 _var = 0;
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_Read<u8>(_var, addr);
return (u8)_var;
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}
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u16 Read16(const u32 addr) {
u16_le _var = 0;
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_Read<u16_le>(_var, addr);
return (u16)_var;
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}
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u32 Read32(const u32 addr) {
u32_le _var = 0;
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_Read<u32_le>(_var, addr);
return _var;
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}
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u64 Read64(const u32 addr) {
u64_le _var = 0;
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_Read<u64_le>(_var, addr);
return _var;
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}
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u32 Read8_ZX(const u32 addr) {
return (u32)Read8(addr);
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}
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u32 Read16_ZX(const u32 addr) {
return (u32)Read16(addr);
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}
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void Write8(const u32 addr, const u8 data) {
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_Write<u8>(addr, data);
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}
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void Write16(const u32 addr, const u16 data) {
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_Write<u16_le>(addr, data);
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}
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void Write32(const u32 addr, const u32 data) {
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_Write<u32_le>(addr, data);
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}
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void Write64(const u32 addr, const u64 data) {
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_Write<u64_le>(addr, data);
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}
} // namespace