dynarmic: Update to d1d4705
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externals/dynarmic
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2
externals/dynarmic
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@ -1 +1 @@
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Subproject commit 4110494ac4edc83f74c65834ab3ba6ddd166f42e
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Subproject commit d1d4705364031512cb89333aebc00b8d75a2f732
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@ -30,7 +30,7 @@ static void InterpreterFallback(u32 pc, Dynarmic::Jit* jit, void* user_arg) {
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state->Reg[15] &= (is_thumb ? 0xFFFFFFFE : 0xFFFFFFFC);
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state->Reg[15] &= (is_thumb ? 0xFFFFFFFE : 0xFFFFFFFC);
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jit->Regs() = state->Reg;
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jit->Regs() = state->Reg;
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jit->Cpsr() = state->Cpsr;
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jit->SetCpsr(state->Cpsr);
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jit->ExtRegs() = state->ExtReg;
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jit->ExtRegs() = state->ExtReg;
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jit->SetFpscr(state->VFP[VFP_FPSCR]);
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jit->SetFpscr(state->VFP[VFP_FPSCR]);
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}
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}
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@ -137,7 +137,7 @@ u32 ARM_Dynarmic::GetCPSR() const {
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}
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}
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void ARM_Dynarmic::SetCPSR(u32 cpsr) {
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void ARM_Dynarmic::SetCPSR(u32 cpsr) {
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jit->Cpsr() = cpsr;
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jit->SetCpsr(cpsr);
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}
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}
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u32 ARM_Dynarmic::GetCP15Register(CP15Register reg) {
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u32 ARM_Dynarmic::GetCP15Register(CP15Register reg) {
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@ -168,7 +168,7 @@ void ARM_Dynarmic::LoadContext(const ARM_Interface::ThreadContext& ctx) {
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jit->Regs()[13] = ctx.sp;
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jit->Regs()[13] = ctx.sp;
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jit->Regs()[14] = ctx.lr;
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jit->Regs()[14] = ctx.lr;
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jit->Regs()[15] = ctx.pc;
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jit->Regs()[15] = ctx.pc;
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jit->Cpsr() = ctx.cpsr;
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jit->SetCpsr(ctx.cpsr);
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jit->SetFpscr(ctx.fpscr);
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jit->SetFpscr(ctx.fpscr);
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interpreter_state->VFP[VFP_FPEXC] = ctx.fpexc;
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interpreter_state->VFP[VFP_FPEXC] = ctx.fpexc;
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