Pica/VertexShader: Move code around a bit.
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@ -86,6 +86,8 @@ static void ProcessShaderCode(VertexShaderState& state) {
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bool increment_pc = true;
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bool increment_pc = true;
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bool exit_loop = false;
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bool exit_loop = false;
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const Instruction& instr = *(const Instruction*)state.program_counter;
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const Instruction& instr = *(const Instruction*)state.program_counter;
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const SwizzlePattern& swizzle = *(SwizzlePattern*)&swizzle_data[instr.common.operand_desc_id];
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state.debug.max_offset = std::max<u32>(state.debug.max_offset, 1 + (state.program_counter - shader_memory.data()));
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state.debug.max_offset = std::max<u32>(state.debug.max_offset, 1 + (state.program_counter - shader_memory.data()));
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auto LookupSourceRegister = [&](const SourceRegister& source_reg) -> const float24* {
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auto LookupSourceRegister = [&](const SourceRegister& source_reg) -> const float24* {
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@ -100,47 +102,52 @@ static void ProcessShaderCode(VertexShaderState& state) {
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return &shader_uniforms.f[source_reg.GetIndex()].x;
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return &shader_uniforms.f[source_reg.GetIndex()].x;
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}
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}
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};
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};
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bool is_inverted = 0 != (instr.opcode.GetInfo().subtype & Instruction::OpCodeInfo::SrcInversed);
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const float24* src1_ = LookupSourceRegister(instr.common.GetSrc1(is_inverted));
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const float24* src2_ = LookupSourceRegister(instr.common.GetSrc2(is_inverted));
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float24* dest = (instr.common.dest < 0x08) ? state.output_register_table[4*instr.common.dest.GetIndex()]
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: (instr.common.dest < 0x10) ? nullptr
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: (instr.common.dest < 0x20) ? &state.temporary_registers[instr.common.dest.GetIndex()][0]
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: nullptr;
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const SwizzlePattern& swizzle = *(SwizzlePattern*)&swizzle_data[instr.common.operand_desc_id];
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switch (instr.opcode.GetInfo().type) {
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const bool negate_src1 = (swizzle.negate_src1 != 0);
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case Instruction::OpCodeType::Arithmetic:
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const bool negate_src2 = (swizzle.negate_src2 != 0);
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{
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bool is_inverted = 0 != (instr.opcode.GetInfo().subtype & Instruction::OpCodeInfo::SrcInversed);
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const float24* src1_ = LookupSourceRegister(instr.common.GetSrc1(is_inverted));
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const float24* src2_ = LookupSourceRegister(instr.common.GetSrc2(is_inverted));
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float24 src1[4] = {
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const bool negate_src1 = (swizzle.negate_src1 != 0);
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src1_[(int)swizzle.GetSelectorSrc1(0)],
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const bool negate_src2 = (swizzle.negate_src2 != 0);
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src1_[(int)swizzle.GetSelectorSrc1(1)],
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src1_[(int)swizzle.GetSelectorSrc1(2)],
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src1_[(int)swizzle.GetSelectorSrc1(3)],
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};
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if (negate_src1) {
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src1[0] = src1[0] * float24::FromFloat32(-1);
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src1[1] = src1[1] * float24::FromFloat32(-1);
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src1[2] = src1[2] * float24::FromFloat32(-1);
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src1[3] = src1[3] * float24::FromFloat32(-1);
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}
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float24 src2[4] = {
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src2_[(int)swizzle.GetSelectorSrc2(0)],
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src2_[(int)swizzle.GetSelectorSrc2(1)],
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src2_[(int)swizzle.GetSelectorSrc2(2)],
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src2_[(int)swizzle.GetSelectorSrc2(3)],
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};
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if (negate_src2) {
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src2[0] = src2[0] * float24::FromFloat32(-1);
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src2[1] = src2[1] * float24::FromFloat32(-1);
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src2[2] = src2[2] * float24::FromFloat32(-1);
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src2[3] = src2[3] * float24::FromFloat32(-1);
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}
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switch (instr.opcode) {
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float24 src1[4] = {
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src1_[(int)swizzle.GetSelectorSrc1(0)],
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src1_[(int)swizzle.GetSelectorSrc1(1)],
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src1_[(int)swizzle.GetSelectorSrc1(2)],
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src1_[(int)swizzle.GetSelectorSrc1(3)],
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};
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if (negate_src1) {
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src1[0] = src1[0] * float24::FromFloat32(-1);
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src1[1] = src1[1] * float24::FromFloat32(-1);
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src1[2] = src1[2] * float24::FromFloat32(-1);
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src1[3] = src1[3] * float24::FromFloat32(-1);
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}
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float24 src2[4] = {
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src2_[(int)swizzle.GetSelectorSrc2(0)],
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src2_[(int)swizzle.GetSelectorSrc2(1)],
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src2_[(int)swizzle.GetSelectorSrc2(2)],
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src2_[(int)swizzle.GetSelectorSrc2(3)],
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};
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if (negate_src2) {
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src2[0] = src2[0] * float24::FromFloat32(-1);
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src2[1] = src2[1] * float24::FromFloat32(-1);
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src2[2] = src2[2] * float24::FromFloat32(-1);
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src2[3] = src2[3] * float24::FromFloat32(-1);
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}
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float24* dest = (instr.common.dest < 0x08) ? state.output_register_table[4*instr.common.dest.GetIndex()]
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: (instr.common.dest < 0x10) ? nullptr
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: (instr.common.dest < 0x20) ? &state.temporary_registers[instr.common.dest.GetIndex()][0]
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: nullptr;
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state.debug.max_opdesc_id = std::max<u32>(state.debug.max_opdesc_id, 1+instr.common.operand_desc_id);
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switch (instr.opcode) {
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case Instruction::OpCode::ADD:
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case Instruction::OpCode::ADD:
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{
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{
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state.debug.max_opdesc_id = std::max<u32>(state.debug.max_opdesc_id, 1+instr.common.operand_desc_id);
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for (int i = 0; i < 4; ++i) {
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for (int i = 0; i < 4; ++i) {
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if (!swizzle.DestComponentEnabled(i))
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if (!swizzle.DestComponentEnabled(i))
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continue;
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continue;
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@ -153,7 +160,6 @@ static void ProcessShaderCode(VertexShaderState& state) {
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case Instruction::OpCode::MUL:
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case Instruction::OpCode::MUL:
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{
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{
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state.debug.max_opdesc_id = std::max<u32>(state.debug.max_opdesc_id, 1+instr.common.operand_desc_id);
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for (int i = 0; i < 4; ++i) {
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for (int i = 0; i < 4; ++i) {
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if (!swizzle.DestComponentEnabled(i))
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if (!swizzle.DestComponentEnabled(i))
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continue;
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continue;
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@ -167,7 +173,6 @@ static void ProcessShaderCode(VertexShaderState& state) {
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case Instruction::OpCode::DP3:
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case Instruction::OpCode::DP3:
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case Instruction::OpCode::DP4:
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case Instruction::OpCode::DP4:
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{
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{
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state.debug.max_opdesc_id = std::max<u32>(state.debug.max_opdesc_id, 1+instr.common.operand_desc_id);
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float24 dot = float24::FromFloat32(0.f);
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float24 dot = float24::FromFloat32(0.f);
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int num_components = (instr.opcode == Instruction::OpCode::DP3) ? 3 : 4;
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int num_components = (instr.opcode == Instruction::OpCode::DP3) ? 3 : 4;
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for (int i = 0; i < num_components; ++i)
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for (int i = 0; i < num_components; ++i)
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@ -185,7 +190,6 @@ static void ProcessShaderCode(VertexShaderState& state) {
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// Reciprocal
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// Reciprocal
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case Instruction::OpCode::RCP:
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case Instruction::OpCode::RCP:
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{
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{
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state.debug.max_opdesc_id = std::max<u32>(state.debug.max_opdesc_id, 1+instr.common.operand_desc_id);
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for (int i = 0; i < 4; ++i) {
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for (int i = 0; i < 4; ++i) {
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if (!swizzle.DestComponentEnabled(i))
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if (!swizzle.DestComponentEnabled(i))
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continue;
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continue;
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@ -201,7 +205,6 @@ static void ProcessShaderCode(VertexShaderState& state) {
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// Reciprocal Square Root
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// Reciprocal Square Root
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case Instruction::OpCode::RSQ:
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case Instruction::OpCode::RSQ:
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{
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{
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state.debug.max_opdesc_id = std::max<u32>(state.debug.max_opdesc_id, 1+instr.common.operand_desc_id);
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for (int i = 0; i < 4; ++i) {
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for (int i = 0; i < 4; ++i) {
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if (!swizzle.DestComponentEnabled(i))
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if (!swizzle.DestComponentEnabled(i))
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continue;
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continue;
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@ -216,7 +219,6 @@ static void ProcessShaderCode(VertexShaderState& state) {
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case Instruction::OpCode::MOV:
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case Instruction::OpCode::MOV:
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{
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{
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state.debug.max_opdesc_id = std::max<u32>(state.debug.max_opdesc_id, 1+instr.common.operand_desc_id);
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for (int i = 0; i < 4; ++i) {
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for (int i = 0; i < 4; ++i) {
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if (!swizzle.DestComponentEnabled(i))
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if (!swizzle.DestComponentEnabled(i))
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continue;
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continue;
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@ -226,6 +228,17 @@ static void ProcessShaderCode(VertexShaderState& state) {
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break;
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break;
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}
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}
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default:
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LOG_ERROR(HW_GPU, "Unhandled arithmetic instruction: 0x%02x (%s): 0x%08x",
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(int)instr.opcode.Value(), instr.opcode.GetInfo().name, instr.hex);
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break;
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}
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break;
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}
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default:
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// Process instruction explicitly
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switch (instr.opcode) {
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// NOP is currently used as a heuristic for leaving from a function.
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// NOP is currently used as a heuristic for leaving from a function.
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// TODO: This is completely incorrect.
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// TODO: This is completely incorrect.
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case Instruction::OpCode::NOP:
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case Instruction::OpCode::NOP:
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@ -256,6 +269,9 @@ static void ProcessShaderCode(VertexShaderState& state) {
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LOG_ERROR(HW_GPU, "Unhandled instruction: 0x%02x (%s): 0x%08x",
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LOG_ERROR(HW_GPU, "Unhandled instruction: 0x%02x (%s): 0x%08x",
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(int)instr.opcode.Value(), instr.opcode.GetInfo().name, instr.hex);
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(int)instr.opcode.Value(), instr.opcode.GetInfo().name, instr.hex);
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break;
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break;
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}
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break;
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}
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}
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if (increment_pc)
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if (increment_pc)
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