681 lines
19 KiB
C++
681 lines
19 KiB
C++
/* armvirt.c -- ARMulator virtual memory interace: ARM6 Instruction Emulator.
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Copyright (C) 1994 Advanced RISC Machines Ltd.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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/* This file contains a complete ARMulator memory model, modelling a
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"virtual memory" system. A much simpler model can be found in armfast.c,
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and that model goes faster too, but has a fixed amount of memory. This
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model's memory has 64K pages, allocated on demand from a 64K entry page
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table. The routines PutWord and GetWord implement this. Pages are never
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freed as they might be needed again. A single area of memory may be
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defined to generate aborts. */
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#include "armdefs.h"
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#include "skyeye_defs.h"
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//#include "code_cov.h"
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#ifdef VALIDATE /* for running the validate suite */
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#define TUBE 48 * 1024 * 1024 /* write a char on the screen */
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#define ABORTS 1
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#endif
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/* #define ABORTS */
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#ifdef ABORTS /* the memory system will abort */
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/* For the old test suite Abort between 32 Kbytes and 32 Mbytes
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For the new test suite Abort between 8 Mbytes and 26 Mbytes */
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/* #define LOWABORT 32 * 1024
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#define HIGHABORT 32 * 1024 * 1024 */
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#define LOWABORT 8 * 1024 * 1024
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#define HIGHABORT 26 * 1024 * 1024
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#endif
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#define NUMPAGES 64 * 1024
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#define PAGESIZE 64 * 1024
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#define PAGEBITS 16
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#define OFFSETBITS 0xffff
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//chy 2003-08-19: seems no use ????
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int SWI_vector_installed = FALSE;
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extern ARMword skyeye_cachetype;
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/***************************************************************************\
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* Get a byte into Virtual Memory, maybe allocating the page *
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\***************************************************************************/
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static fault_t
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GetByte (ARMul_State * state, ARMword address, ARMword * data)
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{
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fault_t fault;
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fault = mmu_read_byte (state, address, data);
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if (fault) {
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//chy 2003-07-11: sometime has fault, but linux can continue running !!!!????
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// printf("SKYEYE: GetByte fault %d \n", fault);
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}
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return fault;
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}
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/***************************************************************************\
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* Get a halfword into Virtual Memory, maybe allocating the page *
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\***************************************************************************/
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static fault_t
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GetHalfWord (ARMul_State * state, ARMword address, ARMword * data)
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{
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fault_t fault;
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fault = mmu_read_halfword (state, address, data);
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if (fault) {
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//chy 2003-07-11: sometime has fault, but linux can continue running !!!!????
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// printf("SKYEYE: GetHalfWord fault %d \n", fault);
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}
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return fault;
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}
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/***************************************************************************\
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* Get a Word from Virtual Memory, maybe allocating the page *
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\***************************************************************************/
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static fault_t
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GetWord (ARMul_State * state, ARMword address, ARMword * data)
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{
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fault_t fault;
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fault = mmu_read_word (state, address, data);
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if (fault) {
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//chy 2003-07-11: sometime has fault, but linux can continue running !!!!????
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#if 0
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/* XXX */ extern int hack;
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hack = 1;
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#endif
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#if 0
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printf ("mmu_read_word at 0x%08x: ", address);
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switch (fault) {
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case ALIGNMENT_FAULT:
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printf ("ALIGNMENT_FAULT");
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break;
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case SECTION_TRANSLATION_FAULT:
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printf ("SECTION_TRANSLATION_FAULT");
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break;
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case PAGE_TRANSLATION_FAULT:
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printf ("PAGE_TRANSLATION_FAULT");
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break;
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case SECTION_DOMAIN_FAULT:
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printf ("SECTION_DOMAIN_FAULT");
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break;
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case SECTION_PERMISSION_FAULT:
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printf ("SECTION_PERMISSION_FAULT");
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break;
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case SUBPAGE_PERMISSION_FAULT:
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printf ("SUBPAGE_PERMISSION_FAULT");
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break;
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default:
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printf ("Unrecognized fault number!");
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}
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printf ("\tpc = 0x%08x\n", state->Reg[15]);
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#endif
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}
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return fault;
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}
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//2003-07-10 chy: lyh change
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/****************************************************************************\
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* Load a Instrion Word into Virtual Memory *
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\****************************************************************************/
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static fault_t
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LoadInstr (ARMul_State * state, ARMword address, ARMword * instr)
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{
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fault_t fault;
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fault = mmu_load_instr (state, address, instr);
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return fault;
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//if (fault)
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// log_msg("load_instr fault = %d, address = %x\n", fault, address);
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}
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/***************************************************************************\
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* Put a byte into Virtual Memory, maybe allocating the page *
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\***************************************************************************/
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static fault_t
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PutByte (ARMul_State * state, ARMword address, ARMword data)
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{
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fault_t fault;
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fault = mmu_write_byte (state, address, data);
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if (fault) {
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//chy 2003-07-11: sometime has fault, but linux can continue running !!!!????
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// printf("SKYEYE: PutByte fault %d \n", fault);
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}
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return fault;
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}
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/***************************************************************************\
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* Put a halfword into Virtual Memory, maybe allocating the page *
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\***************************************************************************/
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static fault_t
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PutHalfWord (ARMul_State * state, ARMword address, ARMword data)
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{
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fault_t fault;
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fault = mmu_write_halfword (state, address, data);
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if (fault) {
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//chy 2003-07-11: sometime has fault, but linux can continue running !!!!????
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// printf("SKYEYE: PutHalfWord fault %d \n", fault);
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}
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return fault;
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}
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/***************************************************************************\
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* Put a Word into Virtual Memory, maybe allocating the page *
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\***************************************************************************/
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static fault_t
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PutWord (ARMul_State * state, ARMword address, ARMword data)
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{
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fault_t fault;
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fault = mmu_write_word (state, address, data);
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if (fault) {
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//chy 2003-07-11: sometime has fault, but linux can continue running !!!!????
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#if 0
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/* XXX */ extern int hack;
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hack = 1;
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#endif
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#if 0
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printf ("mmu_write_word at 0x%08x: ", address);
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switch (fault) {
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case ALIGNMENT_FAULT:
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printf ("ALIGNMENT_FAULT");
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break;
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case SECTION_TRANSLATION_FAULT:
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printf ("SECTION_TRANSLATION_FAULT");
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break;
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case PAGE_TRANSLATION_FAULT:
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printf ("PAGE_TRANSLATION_FAULT");
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break;
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case SECTION_DOMAIN_FAULT:
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printf ("SECTION_DOMAIN_FAULT");
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break;
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case SECTION_PERMISSION_FAULT:
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printf ("SECTION_PERMISSION_FAULT");
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break;
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case SUBPAGE_PERMISSION_FAULT:
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printf ("SUBPAGE_PERMISSION_FAULT");
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break;
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default:
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printf ("Unrecognized fault number!");
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}
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printf ("\tpc = 0x%08x\n", state->Reg[15]);
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#endif
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}
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return fault;
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}
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/***************************************************************************\
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* Initialise the memory interface *
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\***************************************************************************/
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unsigned
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ARMul_MemoryInit (ARMul_State * state, unsigned int initmemsize)
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{
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return TRUE;
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}
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/***************************************************************************\
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* Remove the memory interface *
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\***************************************************************************/
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void
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ARMul_MemoryExit (ARMul_State * state)
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{
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}
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/***************************************************************************\
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* ReLoad Instruction *
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\***************************************************************************/
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ARMword
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ARMul_ReLoadInstr (ARMul_State * state, ARMword address, ARMword isize)
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{
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ARMword data;
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fault_t fault;
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#ifdef ABORTS
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if (address >= LOWABORT && address < HIGHABORT) {
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ARMul_PREFETCHABORT (address);
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return ARMul_ABORTWORD;
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}
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else {
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ARMul_CLEARABORT;
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}
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#endif
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#if 0
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/* do profiling for code coverage */
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if (skyeye_config.code_cov.prof_on)
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cov_prof(EXEC_FLAG, address);
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#endif
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#if 1
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if ((isize == 2) && (address & 0x2)) {
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ARMword lo, hi;
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if (!(skyeye_cachetype == INSTCACHE))
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fault = GetHalfWord (state, address, &lo);
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else
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fault = LoadInstr (state, address, &lo);
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#if 0
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if (!fault) {
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if (!(skyeye_cachetype == INSTCACHE))
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fault = GetHalfWord (state, address + isize, &hi);
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else
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fault = LoadInstr (state, address + isize, &hi);
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}
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#endif
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if (fault) {
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ARMul_PREFETCHABORT (address);
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return ARMul_ABORTWORD;
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}
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else {
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ARMul_CLEARABORT;
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}
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return lo;
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#if 0
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if (state->bigendSig == HIGH)
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return (lo << 16) | (hi >> 16);
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else
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return ((hi & 0xFFFF) << 16) | (lo >> 16);
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#endif
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}
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#endif
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if (!(skyeye_cachetype == INSTCACHE))
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fault = GetWord (state, address, &data);
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else
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fault = LoadInstr (state, address, &data);
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if (fault) {
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/* dyf add for s3c6410 no instcache temporary 2010.9.17 */
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if (!(skyeye_cachetype == INSTCACHE)) {
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/* set translation fault on prefetch abort */
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state->mmu.fault_statusi = fault & 0xFF;
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state->mmu.fault_address = address;
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}
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/* add end */
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ARMul_PREFETCHABORT (address);
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return ARMul_ABORTWORD;
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}
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else {
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ARMul_CLEARABORT;
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}
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return data;
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}
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/***************************************************************************\
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* Load Instruction, Sequential Cycle *
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\***************************************************************************/
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ARMword
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ARMul_LoadInstrS (ARMul_State * state, ARMword address, ARMword isize)
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{
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state->NumScycles++;
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#ifdef HOURGLASS
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if ((state->NumScycles & HOURGLASS_RATE) == 0) {
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HOURGLASS;
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}
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#endif
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return ARMul_ReLoadInstr (state, address, isize);
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}
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/***************************************************************************\
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* Load Instruction, Non Sequential Cycle *
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\***************************************************************************/
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ARMword
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ARMul_LoadInstrN (ARMul_State * state, ARMword address, ARMword isize)
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{
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state->NumNcycles++;
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return ARMul_ReLoadInstr (state, address, isize);
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}
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/***************************************************************************\
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* Read Word (but don't tell anyone!) *
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\***************************************************************************/
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ARMword
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ARMul_ReadWord (ARMul_State * state, ARMword address)
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{
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ARMword data;
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fault_t fault;
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#ifdef ABORTS
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if (address >= LOWABORT && address < HIGHABORT) {
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ARMul_DATAABORT (address);
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return ARMul_ABORTWORD;
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}
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else {
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ARMul_CLEARABORT;
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}
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#endif
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fault = GetWord (state, address, &data);
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if (fault) {
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state->mmu.fault_status =
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(fault | (state->mmu.last_domain << 4)) & 0xFF;
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state->mmu.fault_address = address;
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ARMul_DATAABORT (address);
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return ARMul_ABORTWORD;
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}
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else {
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ARMul_CLEARABORT;
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}
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return data;
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}
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/***************************************************************************\
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* Load Word, Sequential Cycle *
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\***************************************************************************/
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ARMword
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ARMul_LoadWordS (ARMul_State * state, ARMword address)
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{
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state->NumScycles++;
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return ARMul_ReadWord (state, address);
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}
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/***************************************************************************\
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* Load Word, Non Sequential Cycle *
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\***************************************************************************/
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ARMword
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ARMul_LoadWordN (ARMul_State * state, ARMword address)
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{
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state->NumNcycles++;
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return ARMul_ReadWord (state, address);
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}
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/***************************************************************************\
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* Load Halfword, (Non Sequential Cycle) *
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\***************************************************************************/
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ARMword
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ARMul_LoadHalfWord (ARMul_State * state, ARMword address)
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{
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ARMword data;
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fault_t fault;
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state->NumNcycles++;
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fault = GetHalfWord (state, address, &data);
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if (fault) {
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state->mmu.fault_status =
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(fault | (state->mmu.last_domain << 4)) & 0xFF;
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state->mmu.fault_address = address;
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ARMul_DATAABORT (address);
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return ARMul_ABORTWORD;
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}
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else {
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ARMul_CLEARABORT;
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}
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return data;
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}
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/***************************************************************************\
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* Read Byte (but don't tell anyone!) *
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\***************************************************************************/
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int ARMul_ICE_ReadByte(ARMul_State * state, ARMword address, ARMword *presult)
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{
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ARMword data;
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fault_t fault;
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fault = GetByte (state, address, &data);
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if (fault) {
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*presult=-1; fault=ALIGNMENT_FAULT; return fault;
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}else{
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*(char *)presult=(unsigned char)(data & 0xff); fault=NO_FAULT; return fault;
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}
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}
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ARMword
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ARMul_ReadByte (ARMul_State * state, ARMword address)
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{
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ARMword data;
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fault_t fault;
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fault = GetByte (state, address, &data);
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if (fault) {
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state->mmu.fault_status =
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(fault | (state->mmu.last_domain << 4)) & 0xFF;
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state->mmu.fault_address = address;
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ARMul_DATAABORT (address);
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return ARMul_ABORTWORD;
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}
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else {
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ARMul_CLEARABORT;
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}
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return data;
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}
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/***************************************************************************\
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* Load Byte, (Non Sequential Cycle) *
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\***************************************************************************/
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ARMword
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ARMul_LoadByte (ARMul_State * state, ARMword address)
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{
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state->NumNcycles++;
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return ARMul_ReadByte (state, address);
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}
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/***************************************************************************\
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* Write Word (but don't tell anyone!) *
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\***************************************************************************/
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void
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ARMul_WriteWord (ARMul_State * state, ARMword address, ARMword data)
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{
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fault_t fault;
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#ifdef ABORTS
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if (address >= LOWABORT && address < HIGHABORT) {
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ARMul_DATAABORT (address);
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return;
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}
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else {
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ARMul_CLEARABORT;
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}
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#endif
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fault = PutWord (state, address, data);
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if (fault) {
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state->mmu.fault_status =
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(fault | (state->mmu.last_domain << 4)) & 0xFF;
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state->mmu.fault_address = address;
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ARMul_DATAABORT (address);
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return;
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}
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else {
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ARMul_CLEARABORT;
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}
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}
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/***************************************************************************\
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* Store Word, Sequential Cycle *
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\***************************************************************************/
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void
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ARMul_StoreWordS (ARMul_State * state, ARMword address, ARMword data)
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{
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state->NumScycles++;
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ARMul_WriteWord (state, address, data);
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}
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/***************************************************************************\
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* Store Word, Non Sequential Cycle *
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\***************************************************************************/
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void
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ARMul_StoreWordN (ARMul_State * state, ARMword address, ARMword data)
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{
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state->NumNcycles++;
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ARMul_WriteWord (state, address, data);
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}
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/***************************************************************************\
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* Store HalfWord, (Non Sequential Cycle) *
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\***************************************************************************/
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void
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ARMul_StoreHalfWord (ARMul_State * state, ARMword address, ARMword data)
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{
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fault_t fault;
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state->NumNcycles++;
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fault = PutHalfWord (state, address, data);
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if (fault) {
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state->mmu.fault_status =
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(fault | (state->mmu.last_domain << 4)) & 0xFF;
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state->mmu.fault_address = address;
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ARMul_DATAABORT (address);
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return;
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}
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else {
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ARMul_CLEARABORT;
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}
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}
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//chy 2006-04-15
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int ARMul_ICE_WriteByte (ARMul_State * state, ARMword address, ARMword data)
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{
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fault_t fault;
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fault = PutByte (state, address, data);
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if (fault)
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return 1;
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else
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return 0;
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}
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/***************************************************************************\
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* Write Byte (but don't tell anyone!) *
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\***************************************************************************/
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//chy 2003-07-10, add real write byte fun
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void
|
|
ARMul_WriteByte (ARMul_State * state, ARMword address, ARMword data)
|
|
{
|
|
fault_t fault;
|
|
fault = PutByte (state, address, data);
|
|
if (fault) {
|
|
state->mmu.fault_status =
|
|
(fault | (state->mmu.last_domain << 4)) & 0xFF;
|
|
state->mmu.fault_address = address;
|
|
ARMul_DATAABORT (address);
|
|
return;
|
|
}
|
|
else {
|
|
ARMul_CLEARABORT;
|
|
}
|
|
}
|
|
|
|
/***************************************************************************\
|
|
* Store Byte, (Non Sequential Cycle) *
|
|
\***************************************************************************/
|
|
|
|
void
|
|
ARMul_StoreByte (ARMul_State * state, ARMword address, ARMword data)
|
|
{
|
|
state->NumNcycles++;
|
|
|
|
#ifdef VALIDATE
|
|
if (address == TUBE) {
|
|
if (data == 4)
|
|
state->Emulate = FALSE;
|
|
else
|
|
(void) putc ((char) data, stderr); /* Write Char */
|
|
return;
|
|
}
|
|
#endif
|
|
|
|
ARMul_WriteByte (state, address, data);
|
|
}
|
|
|
|
/***************************************************************************\
|
|
* Swap Word, (Two Non Sequential Cycles) *
|
|
\***************************************************************************/
|
|
|
|
ARMword
|
|
ARMul_SwapWord (ARMul_State * state, ARMword address, ARMword data)
|
|
{
|
|
ARMword temp;
|
|
|
|
state->NumNcycles++;
|
|
|
|
temp = ARMul_ReadWord (state, address);
|
|
|
|
state->NumNcycles++;
|
|
|
|
PutWord (state, address, data);
|
|
|
|
return temp;
|
|
}
|
|
|
|
/***************************************************************************\
|
|
* Swap Byte, (Two Non Sequential Cycles) *
|
|
\***************************************************************************/
|
|
|
|
ARMword
|
|
ARMul_SwapByte (ARMul_State * state, ARMword address, ARMword data)
|
|
{
|
|
ARMword temp;
|
|
|
|
temp = ARMul_LoadByte (state, address);
|
|
ARMul_StoreByte (state, address, data);
|
|
|
|
return temp;
|
|
}
|
|
|
|
/***************************************************************************\
|
|
* Count I Cycles *
|
|
\***************************************************************************/
|
|
|
|
void
|
|
ARMul_Icycles (ARMul_State * state, unsigned number,
|
|
ARMword address)
|
|
{
|
|
state->NumIcycles += number;
|
|
ARMul_CLEARABORT;
|
|
}
|
|
|
|
/***************************************************************************\
|
|
* Count C Cycles *
|
|
\***************************************************************************/
|
|
|
|
void
|
|
ARMul_Ccycles (ARMul_State * state, unsigned number,
|
|
ARMword address)
|
|
{
|
|
state->NumCcycles += number;
|
|
ARMul_CLEARABORT;
|
|
}
|