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Add AGP GART implementation

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This commit is contained in:
RichardG867
2021-11-10 21:14:54 -03:00
parent d65cfe1f50
commit 724accd167
7 changed files with 322 additions and 68 deletions
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34
src/chipset/intel_4x0.c
View File

@@ -29,6 +29,7 @@
#include <86box/chipset.h>
#include <86box/spd.h>
#include <86box/machine.h>
#include <86box/video.h>
enum
@@ -57,6 +58,7 @@ typedef struct
uint8_t regs[256], regs_locked[256];
int type;
smram_t *smram_low, *smram_high;
void *agpgart;
} i4x0_t;
@@ -208,14 +210,25 @@ i4x0_smram_handler_phase1(i4x0_t *dev)
static void
i4x0_mask_bar(uint8_t *regs)
i4x0_mask_bar(uint8_t *regs, void *agpgart)
{
uint32_t bar;
/* Make sure the aperture's base is aligned to its size. */
bar = (regs[0x13] << 24) | (regs[0x12] << 16);
bar &= (((uint32_t) regs[0xb4] << 22) | 0xf0000000);
regs[0x12] = (bar >> 16) & 0xff;
regs[0x13] = (bar >> 24) & 0xff;
if (!agpgart)
return;
/* Map aperture and GART. */
agpgart_set_aperture(agpgart,
bar,
((uint32_t) (uint8_t) (~regs[0xb4] & 0x3f) + 1) << 22,
!!(regs[0x51] & 0x02));
agpgart_set_gart(agpgart, (regs[0xb9] << 8) | (regs[0xba] << 16) | (regs[0xbb] << 24));
}
@@ -323,7 +336,7 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
case INTEL_440BX: case INTEL_440ZX:
case INTEL_440GX:
regs[0x12] = (val & 0xc0);
i4x0_mask_bar(regs);
i4x0_mask_bar(regs, dev->agpgart);
break;
}
break;
@@ -333,7 +346,7 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
case INTEL_440BX: case INTEL_440ZX:
case INTEL_440GX:
regs[0x13] = val;
i4x0_mask_bar(regs);
i4x0_mask_bar(regs, dev->agpgart);
break;
}
break;
@@ -411,15 +424,19 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
break;
case INTEL_440LX:
regs[0x51] = (regs[0x51] & 0x40) | (val & 0x87);
i4x0_mask_bar(regs, dev->agpgart);
break;
case INTEL_440EX:
regs[0x51] = (val & 0x86);
i4x0_mask_bar(regs, dev->agpgart);
break;
case INTEL_440BX: case INTEL_440ZX:
regs[0x51] = (regs[0x51] & 0x70) | (val & 0x8f);
i4x0_mask_bar(regs, dev->agpgart);
break;
case INTEL_440GX:
regs[0x51] = (regs[0x51] & 0xb0) | (val & 0x4f);
i4x0_mask_bar(regs, dev->agpgart);
break;
}
break;
@@ -1074,7 +1091,7 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
case INTEL_440BX: case INTEL_440ZX:
case INTEL_440GX:
regs[0xb4] = (val & 0x3f);
i4x0_mask_bar(regs);
i4x0_mask_bar(regs, dev->agpgart);
break;
}
break;
@@ -1084,6 +1101,7 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
case INTEL_440BX: case INTEL_440ZX:
case INTEL_440GX:
regs[0xb9] = (val & 0xf0);
i4x0_mask_bar(regs, dev->agpgart);
break;
}
break;
@@ -1094,6 +1112,7 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
case INTEL_440BX: case INTEL_440ZX:
case INTEL_440GX:
regs[addr] = val;
i4x0_mask_bar(regs, dev->agpgart);
break;
}
break;
@@ -1593,10 +1612,13 @@ static void
pci_add_card(PCI_ADD_NORTHBRIDGE, i4x0_read, i4x0_write, dev);
if ((dev->type >= INTEL_440BX) && !(regs[0x7a] & 0x02))
if ((dev->type >= INTEL_440BX) && !(regs[0x7a] & 0x02)) {
device_add((dev->type == INTEL_440GX) ? &i440gx_agp_device : &i440bx_agp_device);
else if (dev->type >= INTEL_440LX)
dev->agpgart = device_add(&agpgart_device);
} else if (dev->type >= INTEL_440LX) {
device_add(&i440lx_agp_device);
dev->agpgart = device_add(&agpgart_device);
}
return dev;
}

39
src/chipset/via_apollo.c
View File

@@ -33,6 +33,7 @@
#include <86box/pci.h>
#include <86box/chipset.h>
#include <86box/spd.h>
#include <86box/video.h>
#define VIA_585 0x05851000
#define VIA_595 0x05950000
@@ -50,6 +51,7 @@ typedef struct via_apollo_t
uint8_t pci_conf[256];
smram_t *smram;
void *agpgart;
} via_apollo_t;
@@ -86,6 +88,25 @@ apollo_smram_map(via_apollo_t *dev, int smm, uint32_t host_base, uint32_t size,
}
static void
apollo_agp_map(via_apollo_t *dev)
{
/* Make sure the aperture's base is aligned to its size. */
dev->pci_conf[0x12] &= dev->pci_conf[0x84] << 4;
dev->pci_conf[0x13] &= 0xf0 | (dev->pci_conf[0x84] >> 4);
if (!dev->agpgart)
return;
/* Map aperture and GART. */
agpgart_set_aperture(dev->agpgart,
(dev->pci_conf[0x12] << 16) | (dev->pci_conf[0x13] << 24),
((uint32_t) (uint8_t) ~dev->pci_conf[0x84] + 1) << 20,
!!(dev->pci_conf[0x88] & 0x02));
agpgart_set_gart(dev->agpgart, (dev->pci_conf[0x89] << 8) | (dev->pci_conf[0x8a] << 16) | (dev->pci_conf[0x8b] << 24));
}
static void
via_apollo_setup(via_apollo_t *dev)
{
@@ -221,6 +242,8 @@ via_apollo_host_bridge_write(int func, int addr, uint8_t val, void *priv)
((addr >= 0xad) && (addr < 0xf0)) || ((addr >= 0xf8) && (addr < 0xfc)) ||
(addr == 0xfd))
return;
if (((addr == 0x12) || (addr == 0x13)) && (dev->id < VIA_597))
return;
if (((addr == 0x78) || (addr >= 0xad)) && (dev->id == VIA_597))
return;
if (((addr == 0x67) || ((addr >= 0xf0) && (addr < 0xfc))) && (dev->id < VIA_691))
@@ -260,9 +283,11 @@ via_apollo_host_bridge_write(int func, int addr, uint8_t val, void *priv)
break;
case 0x12: /* Graphics Aperture Base */
dev->pci_conf[0x12] = (val & 0xf0);
apollo_agp_map(dev);
break;
case 0x13: /* Graphics Aperture Base */
dev->pci_conf[0x13] = val;
apollo_agp_map(dev);
break;
case 0x50: /* Cache Control 1 */
@@ -580,20 +605,23 @@ via_apollo_host_bridge_write(int func, int addr, uint8_t val, void *priv)
dev->pci_conf[0x84] = val;
else
dev->pci_conf[0x84] = (dev->pci_conf[0x84] & ~0xf0) | (val & 0xf0);
apollo_agp_map(dev);
break;
case 0x88:
if((dev->id == VIA_693A) || (dev->id == VIA_8601))
dev->pci_conf[0x88] = (dev->pci_conf[0x88] & ~0x06) | (val & 0x06);
else
dev->pci_conf[0x88] = (dev->pci_conf[0x88] & ~0x07) | (val & 0x07);
apollo_agp_map(dev);
break;
case 0x89:
dev->pci_conf[0x89] = val & 0xf0;
apollo_agp_map(dev);
break;
case 0x8a:
case 0x8b:
if((dev->id == VIA_693A) || (dev->id == VIA_8601))
dev->pci_conf[addr] = val;
else
dev->pci_conf[0x89] = (dev->pci_conf[0x89] & ~0xf0) | (val & 0xf0);
dev->pci_conf[addr] = val;
apollo_agp_map(dev);
break;
case 0xa8:
@@ -706,6 +734,9 @@ via_apollo_init(const device_t *info)
break;
}
if (dev->id >= VIA_597)
dev->agpgart = device_add(&agpgart_device);
if ((dev->id >= VIA_694) && (dev->id != VIA_8601))
dev->drb_unit = 16;
else if (dev->id >= VIA_597)

6
src/include/86box/video.h
View File

@@ -193,6 +193,9 @@ extern void svga_dump_vram(void);
extern uint32_t video_color_transform(uint32_t color);
extern void agpgart_set_aperture(void *handle, uint32_t base, uint32_t size, int enable);
extern void agpgart_set_gart(void *handle, uint32_t base);
#ifdef __cplusplus
}
#endif
@@ -426,6 +429,9 @@ extern const device_t velocity_100_agp_device;
/* Wyse 700 */
extern const device_t wy700_device;
/* AGP GART */
extern const device_t agpgart_device;
#endif

2
src/video/CMakeLists.txt
View File

@@ -13,7 +13,7 @@
# Copyright 2020,2021 David Hrdlička.
#
add_library(vid OBJECT video.c vid_table.c vid_cga.c vid_cga_comp.c
add_library(vid OBJECT agpgart.c video.c vid_table.c vid_cga.c vid_cga_comp.c
vid_compaq_cga.c vid_mda.c vid_hercules.c vid_herculesplus.c
vid_incolor.c vid_colorplus.c vid_genius.c vid_pgc.c vid_im1024.c
vid_sigma.c vid_wy700.c vid_ega.c vid_ega_render.c vid_svga.c

193
src/video/agpgart.c Normal file
View File

@@ -0,0 +1,193 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* AGP Graphics Address Remapping Table remapping emulation.
*
*
*
* Authors: RichardG, <richardg867@gmail.com>
*
* Copyright 2021 RichardG.
*/
#include <stdarg.h>
#include <stdio.h>
#include <stdint.h>
#include <stdlib.h>
#include <string.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include <86box/device.h>
#include <86box/mem.h>
typedef struct {
int aperture_enable;
uint32_t aperture_base, aperture_size, aperture_mask, gart_base;
mem_mapping_t aperture_mapping;
} agpgart_t;
#define ENABLE_AGPGART_LOG 1
#ifdef ENABLE_AGPGART_LOG
int agpgart_do_log = ENABLE_AGPGART_LOG;
static void
agpgart_log(const char *fmt, ...)
{
va_list ap;
if (agpgart_do_log) {
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
}
#else
#define agpgart_log(fmt, ...)
#endif
void
agpgart_set_aperture(void *handle, uint32_t base, uint32_t size, int enable)
{
agpgart_t *dev = (agpgart_t *) handle;
agpgart_log("AGP GART: set_aperture(%08X, %d, %d)\n", base, size, enable);
/* Disable old aperture mapping. */
mem_mapping_disable(&dev->aperture_mapping);
/* Set new aperture base address, size and mask. */
dev->aperture_base = base;
dev->aperture_size = size;
dev->aperture_mask = size - 1;
/* Enable new aperture mapping if requested. */
if (dev->aperture_base && dev->aperture_size && dev->aperture_enable) {
mem_mapping_set_addr(&dev->aperture_mapping, dev->aperture_base, dev->aperture_size);
mem_mapping_enable(&dev->aperture_mapping);
}
}
void
agpgart_set_gart(void *handle, uint32_t base)
{
agpgart_t *dev = (agpgart_t *) handle;
agpgart_log("AGP GART: set_gart(%08X)\n", base);
/* Set GART base address. */
dev->gart_base = base;
}
static uint32_t
agpgart_translate(uint32_t addr, agpgart_t *dev)
{
/* Extract the bits we care about. */
addr &= dev->aperture_mask;
/* Get the GART pointer for this page. */
register uint32_t gart_ptr = mem_readl_phys(dev->gart_base + ((addr >> 10) & 0xfffffffc)) & 0xfffff000;
/* Return remapped address with the page offset. */
return gart_ptr + (addr & 0x00000fff);
}
static uint8_t
agpgart_aperture_readb(uint32_t addr, void *priv)
{
agpgart_t *dev = (agpgart_t *) priv;
return mem_readb_phys(agpgart_translate(addr, dev));
}
static uint16_t
agpgart_aperture_readw(uint32_t addr, void *priv)
{
agpgart_t *dev = (agpgart_t *) priv;
return mem_readw_phys(agpgart_translate(addr, dev));
}
static uint32_t
agpgart_aperture_readl(uint32_t addr, void *priv)
{
agpgart_t *dev = (agpgart_t *) priv;
return mem_readl_phys(agpgart_translate(addr, dev));
}
static void
agpgart_aperture_writeb(uint32_t addr, uint8_t val, void *priv)
{
agpgart_t *dev = (agpgart_t *) priv;
mem_writeb_phys(agpgart_translate(addr, dev), val);
}
static void
agpgart_aperture_writew(uint32_t addr, uint16_t val, void *priv)
{
agpgart_t *dev = (agpgart_t *) priv;
mem_writew_phys(agpgart_translate(addr, dev), val);
}
static void
agpgart_aperture_writel(uint32_t addr, uint32_t val, void *priv)
{
agpgart_t *dev = (agpgart_t *) priv;
mem_writel_phys(agpgart_translate(addr, dev), val);
}
static void *
agpgart_init(const device_t *info)
{
agpgart_t *dev = malloc(sizeof(agpgart_t));
memset(dev, 0, sizeof(agpgart_t));
agpgart_log("AGP GART: init()\n");
/* Create aperture mapping. */
mem_mapping_add(&dev->aperture_mapping, 0, 0,
agpgart_aperture_readb, agpgart_aperture_readw, agpgart_aperture_readl,
agpgart_aperture_writeb, agpgart_aperture_writew, agpgart_aperture_writel,
NULL, MEM_MAPPING_EXTERNAL, dev);
return dev;
}
static void
agpgart_close(void *priv)
{
agpgart_t *dev = (agpgart_t *) priv;
agpgart_log("AGP GART: close()\n");
/* Disable aperture. */
mem_mapping_disable(&dev->aperture_mapping);
free(dev);
}
const device_t agpgart_device =
{
"AGP Graphics Address Remapping Table",
DEVICE_PCI,
0,
agpgart_init, agpgart_close, NULL,
{ NULL },
NULL,
NULL,
NULL
};

114
src/video/vid_voodoo_banshee.c
View File

@@ -14,11 +14,13 @@
*
* Copyright 2008-2020 Sarah Walker.
*/
#include <stdarg.h>
#include <stdio.h>
#include <stdint.h>
#include <string.h>
#include <stdlib.h>
#include <stddef.h>
#define HAVE_STDARG_H
#include <wchar.h>
#include <math.h>
#include <86box/86box.h>
@@ -244,7 +246,7 @@ enum
#define MISCINIT0_Y_ORIGIN_SWAP_SHIFT (18)
#define MISCINIT0_Y_ORIGIN_SWAP_MASK (0xfff << MISCINIT0_Y_ORIGIN_SWAP_SHIFT)
#define ENABLE_BANSHEE_LOG 1
#ifdef ENABLE_BANSHEE_LOG
int banshee_do_log = ENABLE_BANSHEE_LOG;
@@ -385,7 +387,7 @@ static void banshee_updatemapping(banshee_t *banshee)
if (!(banshee->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_MEM))
{
// banshee_log("Update mapping - PCI disabled\n");
banshee_log("Update mapping - PCI disabled\n");
mem_mapping_disable(&svga->mapping);
mem_mapping_disable(&banshee->linear_mapping);
mem_mapping_disable(&banshee->reg_mapping_low);
@@ -492,7 +494,7 @@ static void banshee_recalctimings(svga_t *svga)
if (svga->crtc[0x1b] & 0x04) svga->dispend += 0x400;
if (svga->crtc[0x1b] & 0x10) svga->vblankstart += 0x400;
if (svga->crtc[0x1b] & 0x40) svga->vsyncstart += 0x400;
// banshee_log("svga->hdisp=%i\n", svga->hdisp);
banshee_log("svga->hdisp=%i\n", svga->hdisp);
svga->interlace = 0;
@@ -529,7 +531,7 @@ static void banshee_recalctimings(svga_t *svga)
svga->rowoffset = (banshee->vidDesktopOverlayStride & 0x3fff) >> 3;
svga->ma_latch = banshee->vidDesktopStartAddr >> 2;
banshee->desktop_stride_tiled = (banshee->vidDesktopOverlayStride & 0x3fff) * 128 * 32;
// banshee_log("Extended shift out %i rowoffset=%i %02x\n", VIDPROCCFG_DESKTOP_PIX_FORMAT, svga->rowoffset, svga->crtc[1]);
banshee_log("Extended shift out %i rowoffset=%i %02x\n", VIDPROCCFG_DESKTOP_PIX_FORMAT, svga->rowoffset, svga->crtc[1]);
svga->char_width = 8;
svga->split = 99999;
@@ -572,7 +574,7 @@ static void banshee_recalctimings(svga_t *svga)
}
else
{
// banshee_log("Normal shift out\n");
banshee_log("Normal shift out\n");
svga->bpp = 8;
}
@@ -588,7 +590,7 @@ static void banshee_recalctimings(svga_t *svga)
svga->clock = (cpuclock * (float)(1ull << 32)) / freq;
// svga->clock = cpuclock / freq;
// banshee_log("svga->clock = %g %g m=%i k=%i n=%i\n", freq, freq / 1000000.0, m, k, n);
banshee_log("svga->clock = %g %g m=%i k=%i n=%i\n", freq, freq / 1000000.0, m, k, n);
}
}
@@ -597,7 +599,7 @@ static void banshee_ext_out(uint16_t addr, uint8_t val, void *p)
// banshee_t *banshee = (banshee_t *)p;
// svga_t *svga = &banshee->svga;
// banshee_log("banshee_ext_out: addr=%04x val=%02x\n", addr, val);
banshee_log("banshee_ext_out: addr=%04x val=%02x\n", addr, val);
switch (addr & 0xff)
{
@@ -626,7 +628,7 @@ static void banshee_ext_outl(uint16_t addr, uint32_t val, void *p)
voodoo_t *voodoo = banshee->voodoo;
svga_t *svga = &banshee->svga;
// banshee_log("banshee_ext_outl: addr=%04x val=%08x %04x(%08x):%08x\n", addr, val, CS,cs,cpu_state.pc);
banshee_log("banshee_ext_outl: addr=%04x val=%08x %04x(%08x):%08x\n", addr, val, CS,cs,cpu_state.pc);
switch (addr & 0xff)
{
@@ -639,7 +641,7 @@ static void banshee_ext_outl(uint16_t addr, uint32_t val, void *p)
case Init_lfbMemoryConfig:
banshee->lfbMemoryConfig = val;
// banshee_log("lfbMemoryConfig=%08x\n", val);
banshee_log("lfbMemoryConfig=%08x\n", val);
voodoo->tile_base = (val & 0x1fff) << 12;
voodoo->tile_stride = 1024 << ((val >> 13) & 7);
voodoo->tile_stride_shift = 10 + ((val >> 13) & 7);
@@ -705,7 +707,7 @@ static void banshee_ext_outl(uint16_t addr, uint32_t val, void *p)
case Video_vidProcCfg:
banshee->vidProcCfg = val;
// banshee_log("vidProcCfg=%08x\n", val);
banshee_log("vidProcCfg=%08x\n", val);
banshee->overlay_pix_fmt = (val & VIDPROCCFG_OVERLAY_PIX_FORMAT_MASK) >> VIDPROCCFG_OVERLAY_PIX_FORMAT_SHIFT;
svga->hwcursor.ena = val & VIDPROCCFG_HWCURSOR_ENA;
svga->fullchange = changeframecount;
@@ -740,7 +742,7 @@ static void banshee_ext_outl(uint16_t addr, uint32_t val, void *p)
svga->hwcursor.addr = (banshee->hwCurPatAddr & 0xfffff0) + (svga->hwcursor.yoff * 16);
svga->hwcursor.xsize = 64;
svga->hwcursor.ysize = 64;
// banshee_log("hwCurLoc %08x %i\n", val, svga->hwcursor.y);
banshee_log("hwCurLoc %08x %i\n", val, svga->hwcursor.y);
break;
case Video_hwCurC0:
banshee->hwCurC0 = val;
@@ -751,7 +753,7 @@ static void banshee_ext_outl(uint16_t addr, uint32_t val, void *p)
case Video_vidSerialParallelPort:
banshee->vidSerialParallelPort = val;
// banshee_log("vidSerialParallelPort: write %08x %08x %04x(%08x):%08x\n", val, val & (VIDSERIAL_DDC_DCK_W | VIDSERIAL_DDC_DDA_W), CS,cs,cpu_state.pc);
banshee_log("vidSerialParallelPort: write %08x %08x %04x(%08x):%08x\n", val, val & (VIDSERIAL_DDC_DCK_W | VIDSERIAL_DDC_DDA_W), CS,cs,cpu_state.pc);
i2c_gpio_set(banshee->i2c_ddc, !!(val & VIDSERIAL_DDC_DCK_W), !!(val & VIDSERIAL_DDC_DDA_W));
i2c_gpio_set(banshee->i2c, !!(val & VIDSERIAL_I2C_SCK_W), !!(val & VIDSERIAL_I2C_SDA_W));
break;
@@ -779,16 +781,16 @@ static void banshee_ext_outl(uint16_t addr, uint32_t val, void *p)
break;
case Video_vidOverlayDudx:
voodoo->overlay.vidOverlayDudx = val & VID_DUDX_MASK;
// banshee_log("vidOverlayDudx=%08x\n", val);
banshee_log("vidOverlayDudx=%08x\n", val);
break;
case Video_vidOverlayDudxOffsetSrcWidth:
voodoo->overlay.vidOverlayDudxOffsetSrcWidth = val;
voodoo->overlay.overlay_bytes = (val & OVERLAY_SRC_WIDTH_MASK) >> OVERLAY_SRC_WIDTH_SHIFT;
// banshee_log("vidOverlayDudxOffsetSrcWidth=%08x\n", val);
banshee_log("vidOverlayDudxOffsetSrcWidth=%08x\n", val);
break;
case Video_vidOverlayDvdy:
voodoo->overlay.vidOverlayDvdy = val & VID_DVDY_MASK;
// banshee_log("vidOverlayDvdy=%08x\n", val);
banshee_log("vidOverlayDvdy=%08x\n", val);
break;
case Video_vidOverlayDvdyOffset:
voodoo->overlay.vidOverlayDvdyOffset = val;
@@ -797,13 +799,13 @@ static void banshee_ext_outl(uint16_t addr, uint32_t val, void *p)
case Video_vidDesktopStartAddr:
banshee->vidDesktopStartAddr = val & 0xffffff;
// banshee_log("vidDesktopStartAddr=%08x\n", val);
banshee_log("vidDesktopStartAddr=%08x\n", val);
svga->fullchange = changeframecount;
svga_recalctimings(svga);
break;
case Video_vidDesktopOverlayStride:
banshee->vidDesktopOverlayStride = val;
// banshee_log("vidDesktopOverlayStride=%08x\n", val);
banshee_log("vidDesktopOverlayStride=%08x\n", val);
svga->fullchange = changeframecount;
svga_recalctimings(svga);
break;
@@ -822,7 +824,7 @@ static uint8_t banshee_ext_in(uint16_t addr, void *p)
{
case Init_status: case Init_status+1: case Init_status+2: case Init_status+3:
ret = (banshee_status(banshee) >> ((addr & 3) * 8)) & 0xff;
// banshee_log("Read status reg! %04x(%08x):%08x\n", CS, cs, cpu_state.pc);
banshee_log("Read status reg! %04x(%08x):%08x\n", CS, cs, cpu_state.pc);
break;
case 0xb0: case 0xb1: case 0xb2: case 0xb3:
@@ -845,7 +847,7 @@ static uint8_t banshee_ext_in(uint16_t addr, void *p)
break;
}
// banshee_log("banshee_ext_in: addr=%04x val=%02x\n", addr, ret);
banshee_log("banshee_ext_in: addr=%04x val=%02x\n", addr, ret);
return ret;
}
@@ -886,7 +888,7 @@ static uint32_t banshee_status(banshee_t *banshee)
if (!voodoo->voodoo_busy)
voodoo_wake_fifo_thread(voodoo);
// banshee_log("banshee_status: busy %i %i (%i %i) %i %i %i %04x(%08x):%08x %08x\n", busy, written, voodoo->cmd_written, voodoo->cmd_written_fifo, voodoo->cmd_read, voodoo->cmdfifo_depth_rd, voodoo->cmdfifo_depth_wr, CS,cs,cpu_state.pc, ret);
banshee_log("banshee_status: busy %i %i (%i %i) %i %i %i %04x(%08x):%08x %08x\n", busy, written, voodoo->cmd_written, voodoo->cmd_written_fifo, voodoo->cmd_read, voodoo->cmdfifo_depth_rd, voodoo->cmdfifo_depth_wr, CS,cs,cpu_state.pc, ret);
return ret;
}
@@ -904,7 +906,7 @@ static uint32_t banshee_ext_inl(uint16_t addr, void *p)
{
case Init_status:
ret = banshee_status(banshee);
// banshee_log("Read status reg! %04x(%08x):%08x\n", CS, cs, cpu_state.pc);
banshee_log("Read status reg! %04x(%08x):%08x\n", CS, cs, cpu_state.pc);
break;
case Init_pciInit0:
ret = banshee->pciInit0;
@@ -997,7 +999,7 @@ static uint32_t banshee_ext_inl(uint16_t addr, void *p)
if (i2c_gpio_get_sda(banshee->i2c))
ret |= VIDSERIAL_I2C_SDA_R;
}
// banshee_log("vidSerialParallelPort: read %08x %08x %04x(%08x):%08x\n", ret, ret & (VIDSERIAL_DDC_DCK_R | VIDSERIAL_DDC_DDA_R), CS,cs,cpu_state.pc);
banshee_log("vidSerialParallelPort: read %08x %08x %04x(%08x):%08x\n", ret, ret & (VIDSERIAL_DDC_DCK_R | VIDSERIAL_DDC_DDA_R), CS,cs,cpu_state.pc);
break;
case Video_vidScreenSize:
@@ -1044,13 +1046,13 @@ static uint32_t banshee_reg_readl(uint32_t addr, void *p);
static uint8_t banshee_reg_read(uint32_t addr, void *p)
{
// banshee_log("banshee_reg_read: addr=%08x\n", addr);
banshee_log("banshee_reg_read: addr=%08x\n", addr);
return banshee_reg_readl(addr & ~3, p) >> (8*(addr & 3));
}
static uint16_t banshee_reg_readw(uint32_t addr, void *p)
{
// banshee_log("banshee_reg_readw: addr=%08x\n", addr);
banshee_log("banshee_reg_readw: addr=%08x\n", addr);
return banshee_reg_readl(addr & ~3, p) >> (8*(addr & 2));
}
@@ -1063,17 +1065,17 @@ static uint32_t banshee_cmd_read(banshee_t *banshee, uint32_t addr)
{
case cmdBaseAddr0:
ret = voodoo->cmdfifo_base >> 12;
// banshee_log("Read cmdfifo_base %08x\n", ret);
banshee_log("Read cmdfifo_base %08x\n", ret);
break;
case cmdRdPtrL0:
ret = voodoo->cmdfifo_rp;
// banshee_log("Read cmdfifo_rp %08x\n", ret);
banshee_log("Read cmdfifo_rp %08x\n", ret);
break;
case cmdFifoDepth0:
ret = voodoo->cmdfifo_depth_wr - voodoo->cmdfifo_depth_rd;
// banshee_log("Read cmdfifo_depth %08x\n", ret);
banshee_log("Read cmdfifo_depth %08x\n", ret);
break;
case 0x108:
@@ -1244,7 +1246,7 @@ static uint32_t banshee_reg_readl(uint32_t addr, void *p)
static void banshee_reg_write(uint32_t addr, uint8_t val, void *p)
{
// banshee_log("banshee_reg_writeb: addr=%08x val=%02x\n", addr, val);
banshee_log("banshee_reg_writeb: addr=%08x val=%02x\n", addr, val);
}
static void banshee_reg_writew(uint32_t addr, uint16_t val, void *p)
@@ -1254,7 +1256,7 @@ static void banshee_reg_writew(uint32_t addr, uint16_t val, void *p)
cycles -= voodoo->write_time;
// banshee_log("banshee_reg_writew: addr=%08x val=%04x\n", addr, val);
banshee_log("banshee_reg_writew: addr=%08x val=%04x\n", addr, val);
switch (addr & 0x1f00000)
{
case 0x1000000: case 0x1100000: case 0x1200000: case 0x1300000: /*3D LFB*/
@@ -1269,13 +1271,13 @@ static void banshee_reg_writew(uint32_t addr, uint16_t val, void *p)
static void banshee_cmd_write(banshee_t *banshee, uint32_t addr, uint32_t val)
{
voodoo_t *voodoo = banshee->voodoo;
// banshee_log("banshee_cmd_write: addr=%03x val=%08x\n", addr & 0x1fc, val);
banshee_log("banshee_cmd_write: addr=%03x val=%08x\n", addr & 0x1fc, val);
switch (addr & 0x1fc)
{
case cmdBaseAddr0:
voodoo->cmdfifo_base = (val & 0xfff) << 12;
voodoo->cmdfifo_end = voodoo->cmdfifo_base + (((voodoo->cmdfifo_size & 0xff) + 1) << 12);
// banshee_log("cmdfifo_base=%08x cmdfifo_end=%08x %08x\n", voodoo->cmdfifo_base, voodoo->cmdfifo_end, val);
banshee_log("cmdfifo_base=%08x cmdfifo_end=%08x %08x\n", voodoo->cmdfifo_base, voodoo->cmdfifo_end, val);
break;
case cmdBaseSize0:
@@ -1284,11 +1286,11 @@ static void banshee_cmd_write(banshee_t *banshee, uint32_t addr, uint32_t val)
voodoo->cmdfifo_enabled = val & 0x100;
if (!voodoo->cmdfifo_enabled)
voodoo->cmdfifo_in_sub = 0; /*Not sure exactly when this should be reset*/
// banshee_log("cmdfifo_base=%08x cmdfifo_end=%08x\n", voodoo->cmdfifo_base, voodoo->cmdfifo_end);
banshee_log("cmdfifo_base=%08x cmdfifo_end=%08x\n", voodoo->cmdfifo_base, voodoo->cmdfifo_end);
break;
// voodoo->cmdfifo_end = ((val >> 16) & 0x3ff) << 12;
// banshee_log("CMDFIFO base=%08x end=%08x\n", voodoo->cmdfifo_base, voodoo->cmdfifo_end);
banshee_log("CMDFIFO base=%08x end=%08x\n", voodoo->cmdfifo_base, voodoo->cmdfifo_end);
// break;
case cmdRdPtrL0:
@@ -1332,7 +1334,7 @@ static void banshee_reg_writel(uint32_t addr, uint32_t val, void *p)
cycles -= voodoo->write_time;
voodoo->last_write_addr = addr;
// banshee_log("banshee_reg_writel: addr=%08x val=%08x\n", addr, val);
banshee_log("banshee_reg_writel: addr=%08x val=%08x\n", addr, val);
switch (addr & 0x1f00000)
{
@@ -1341,7 +1343,7 @@ static void banshee_reg_writel(uint32_t addr, uint32_t val, void *p)
banshee_ext_outl(addr & 0xff, val, banshee);
else
banshee_cmd_write(banshee, addr, val);
// banshee_log("CMD!!! write %08x %08x\n", addr, val);
banshee_log("CMD!!! write %08x %08x\n", addr, val);
break;
case 0x0100000: /*2D registers*/
@@ -1357,7 +1359,7 @@ static void banshee_reg_writel(uint32_t addr, uint32_t val, void *p)
{
case SST_intrCtrl:
banshee->intrCtrl = val & 0x0030003f;
// banshee_log("intrCtrl=%08x\n", val);
banshee_log("intrCtrl=%08x\n", val);
break;
case SST_userIntrCMD:
@@ -1369,7 +1371,7 @@ static void banshee_reg_writel(uint32_t addr, uint32_t val, void *p)
voodoo_queue_command(voodoo, (addr & 0x3fc) | FIFO_WRITEL_REG, val);
if (!voodoo->voodoo_busy)
voodoo_wake_fifo_threads(voodoo->set, voodoo);
// banshee_log("SST_swapbufferCMD write: %i %i\n", voodoo->cmd_written, voodoo->cmd_written_fifo);
banshee_log("SST_swapbufferCMD write: %i %i\n", voodoo->cmd_written, voodoo->cmd_written_fifo);
break;
case SST_triangleCMD:
voodoo->cmd_written++;
@@ -1441,14 +1443,14 @@ static uint8_t banshee_read_linear(uint32_t addr, void *p)
y = addr >> voodoo->tile_stride_shift;
addr = voodoo->tile_base + (x & 127) + ((x >> 7) * 128*32) + ((y & 31) * 128) + (y >> 5)*voodoo->tile_x_real;
// banshee_log(" Tile rb %08x->%08x %i %i\n", old_addr, addr, x, y);
banshee_log(" Tile rb %08x->%08x %i %i\n", 0, addr, x, y);
}
if (addr >= svga->vram_max)
return 0xff;
cycles -= video_timing_read_b;
// banshee_log("read_linear: addr=%08x val=%02x\n", addr, svga->vram[addr & svga->vram_mask]);
banshee_log("read_linear: addr=%08x val=%02x\n", addr, svga->vram[addr & svga->vram_mask]);
return svga->vram[addr & svga->vram_mask];
}
@@ -1473,14 +1475,14 @@ static uint16_t banshee_read_linear_w(uint32_t addr, void *p)
y = addr >> voodoo->tile_stride_shift;
addr = voodoo->tile_base + (x & 127) + ((x >> 7) * 128*32) + ((y & 31) * 128) + (y >> 5)*voodoo->tile_x_real;
// banshee_log(" Tile rb %08x->%08x %i %i\n", old_addr, addr, x, y);
banshee_log(" Tile rb %08x->%08x %i %i\n", 0, addr, x, y);
}
if (addr >= svga->vram_max)
return 0xff;
cycles -= video_timing_read_w;
// banshee_log("read_linear: addr=%08x val=%02x\n", addr, svga->vram[addr & svga->vram_mask]);
banshee_log("read_linear: addr=%08x val=%02x\n", addr, svga->vram[addr & svga->vram_mask]);
return *(uint16_t *)&svga->vram[addr & svga->vram_mask];
}
@@ -1506,14 +1508,14 @@ static uint32_t banshee_read_linear_l(uint32_t addr, void *p)
y = addr >> voodoo->tile_stride_shift;
addr = voodoo->tile_base + (x & 127) + ((x >> 7) * 128*32) + ((y & 31) * 128) + (y >> 5)*voodoo->tile_x_real;
// banshee_log(" Tile rb %08x->%08x %i %i\n", old_addr, addr, x, y);
banshee_log(" Tile rb %08x->%08x %i %i\n", 0, addr, x, y);
}
if (addr >= svga->vram_max)
return 0xff;
cycles -= video_timing_read_l;
// banshee_log("read_linear: addr=%08x val=%02x\n", addr, svga->vram[addr & svga->vram_mask]);
banshee_log("read_linear: addr=%08x val=%02x\n", addr, svga->vram[addr & svga->vram_mask]);
return *(uint32_t *)&svga->vram[addr & svga->vram_mask];
}
@@ -1526,7 +1528,7 @@ static void banshee_write_linear(uint32_t addr, uint8_t val, void *p)
cycles -= voodoo->write_time;
// banshee_log("write_linear: addr=%08x val=%02x\n", addr, val);
banshee_log("write_linear: addr=%08x val=%02x\n", addr, val);
addr &= svga->decode_mask;
if (addr >= voodoo->tile_base)
{
@@ -1537,7 +1539,7 @@ static void banshee_write_linear(uint32_t addr, uint8_t val, void *p)
y = addr >> voodoo->tile_stride_shift;
addr = voodoo->tile_base + (x & 127) + ((x >> 7) * 128*32) + ((y & 31) * 128) + (y >> 5)*voodoo->tile_x_real;
// banshee_log(" Tile b %08x->%08x %i %i\n", old_addr, addr, x, y);
banshee_log(" Tile b %08x->%08x %i %i\n", 0, addr, x, y);
}
if (addr >= svga->vram_max)
return;
@@ -1562,7 +1564,7 @@ static void banshee_write_linear_w(uint32_t addr, uint16_t val, void *p)
}
cycles -= voodoo->write_time;
// banshee_log("write_linear: addr=%08x val=%02x\n", addr, val);
banshee_log("write_linear: addr=%08x val=%02x\n", addr, val);
addr &= svga->decode_mask;
if (addr >= voodoo->tile_base)
{
@@ -1573,7 +1575,7 @@ static void banshee_write_linear_w(uint32_t addr, uint16_t val, void *p)
y = addr >> voodoo->tile_stride_shift;
addr = voodoo->tile_base + (x & 127) + ((x >> 7) * 128*32) + ((y & 31) * 128) + (y >> 5)*voodoo->tile_x_real;
// banshee_log(" Tile b %08x->%08x %i %i\n", old_addr, addr, x, y);
banshee_log(" Tile b %08x->%08x %i %i\n", 0, addr, x, y);
}
if (addr >= svga->vram_max)
return;
@@ -1616,7 +1618,7 @@ static void banshee_write_linear_l(uint32_t addr, uint32_t val, void *p)
y = addr >> voodoo->tile_stride_shift;
addr = voodoo->tile_base + (x & 127) + ((x >> 7) * 128*32) + ((y & 31) * 128) + (y >> 5)*voodoo->tile_x_real;
// banshee_log(" Tile %08x->%08x->%08x->%08x %i %i tile_x=%i\n", old_addr, addr_off, addr2, addr, x, y, voodoo->tile_x_real);
banshee_log(" Tile %08x->%08x->%08x->%08x %i %i tile_x=%i\n", 0, 0, 0, addr, x, y, voodoo->tile_x_real);
}
if (addr >= svga->vram_max)
@@ -1628,7 +1630,7 @@ static void banshee_write_linear_l(uint32_t addr, uint32_t val, void *p)
*(uint32_t *)&svga->vram[addr & svga->vram_mask] = val;
if (voodoo->cmdfifo_enabled && addr >= voodoo->cmdfifo_base && addr < voodoo->cmdfifo_end)
{
// banshee_log("CMDFIFO write %08x %08x old amin=%08x amax=%08x hlcnt=%i depth_wr=%i rp=%08x\n", addr, val, voodoo->cmdfifo_amin, voodoo->cmdfifo_amax, voodoo->cmdfifo_holecount, voodoo->cmdfifo_depth_wr, voodoo->cmdfifo_rp);
banshee_log("CMDFIFO write %08x %08x old amin=%08x amax=%08x hlcnt=%i depth_wr=%i rp=%08x\n", addr, val, voodoo->cmdfifo_amin, voodoo->cmdfifo_amax, voodoo->cmdfifo_holecount, voodoo->cmdfifo_depth_wr, voodoo->cmdfifo_rp);
if (addr == voodoo->cmdfifo_base && !voodoo->cmdfifo_holecount)
{
// if (voodoo->cmdfifo_holecount)
@@ -1643,7 +1645,7 @@ static void banshee_write_linear_l(uint32_t addr, uint32_t val, void *p)
{
// if ((addr <= voodoo->cmdfifo_amin && voodoo->cmdfifo_amin != -4) || addr >= voodoo->cmdfifo_amax)
// fatal("CMDFIFO holecount write outside of amin/amax - amin=%08x amax=%08x holecount=%i\n", voodoo->cmdfifo_amin, voodoo->cmdfifo_amax, voodoo->cmdfifo_holecount);
// banshee_log("holecount %i\n", voodoo->cmdfifo_holecount);
banshee_log("holecount %i\n", voodoo->cmdfifo_holecount);
voodoo->cmdfifo_holecount--;
if (!voodoo->cmdfifo_holecount)
{
@@ -1651,7 +1653,7 @@ static void banshee_write_linear_l(uint32_t addr, uint32_t val, void *p)
voodoo->cmdfifo_depth_wr += ((voodoo->cmdfifo_amax - voodoo->cmdfifo_amin) >> 2);
voodoo->cmdfifo_amin = voodoo->cmdfifo_amax;
voodoo_wake_fifo_thread(voodoo);
// banshee_log("hole filled! amin=%08x amax=%08x added %i words\n", voodoo->cmdfifo_amin, voodoo->cmdfifo_amax, words_to_add);
banshee_log("hole filled! amin=%08x amax=%08x added %i words\n", voodoo->cmdfifo_amin, voodoo->cmdfifo_amax, 0);
}
}
else if (addr == voodoo->cmdfifo_amax+4)
@@ -1675,7 +1677,7 @@ static void banshee_write_linear_l(uint32_t addr, uint32_t val, void *p)
// fatal("Out-of-order write really out of order\n");
voodoo->cmdfifo_amax = addr;
voodoo->cmdfifo_holecount = ((voodoo->cmdfifo_amax - voodoo->cmdfifo_amin) >> 2) - 1;
// banshee_log("CMDFIFO out of order: amin=%08x amax=%08x holecount=%i\n", voodoo->cmdfifo_amin, voodoo->cmdfifo_amax, voodoo->cmdfifo_holecount);
banshee_log("CMDFIFO out of order: amin=%08x amax=%08x holecount=%i\n", voodoo->cmdfifo_amin, voodoo->cmdfifo_amax, voodoo->cmdfifo_holecount);
}
}
}
@@ -2401,7 +2403,7 @@ static uint8_t banshee_pci_read(int func, int addr, void *p)
if (func)
return 0xff;
// banshee_log("Banshee PCI read %08X ", addr);
banshee_log("Banshee PCI read %08X ", addr);
switch (addr)
{
case 0x00: ret = 0x1a; break; /*3DFX*/
@@ -2482,7 +2484,7 @@ static uint8_t banshee_pci_read(int func, int addr, void *p)
case 0x66: ret = banshee->pci_regs[0x66]; break;
case 0x67: ret = banshee->pci_regs[0x67]; break;
}
// banshee_log("%02X\n", ret);
banshee_log("%02X\n", ret);
return ret;
}
@@ -2493,7 +2495,7 @@ static void banshee_pci_write(int func, int addr, uint8_t val, void *p)
if (func)
return;
// banshee_log("Banshee write %08X %02X %04X:%08X\n", addr, val, CS, cpu_state.pc);
banshee_log("Banshee write %08X %02X %04X:%08X\n", addr, val, CS, cpu_state.pc);
switch (addr)
{
case 0x00: case 0x01: case 0x02: case 0x03:
@@ -2874,7 +2876,7 @@ static void *banshee_init_common(const device_t *info, char *fn, int has_sgram,
static void *banshee_init(const device_t *info)
{
return banshee_init_common(info, "roms/video/voodoo/Pci_sg.rom", 1, TYPE_BANSHEE, VOODOO_BANSHEE, 0);
return banshee_init_common(info, "roms/video/voodoo/Pci_sg.rom", 1, TYPE_BANSHEE, VOODOO_BANSHEE, 1);
}
static void *creative_banshee_init(const device_t *info)
{

2
src/win/Makefile.mingw
View File

@@ -734,7 +734,7 @@ SNDOBJ := sound.o \
snd_wss.o \
snd_ym7128.o
VIDOBJ := video.o \
VIDOBJ := agpgart.o video.o \
vid_table.o \
vid_cga.o vid_cga_comp.o \
vid_compaq_cga.o \