Merge pull request #1488 from 86Box/tc1995

Made all the non-ViRGE S3 cards disable double word access due annoying acceleration issues in some instances of the software cursor for now.
This commit is contained in:
Miran Grča
2021-06-16 03:39:07 +02:00
committed by GitHub
4 changed files with 89 additions and 74 deletions

View File

@@ -612,6 +612,7 @@ extern int machine_ps2_model_50_init(const machine_t *);
extern int machine_ps2_model_55sx_init(const machine_t *);
extern int machine_ps2_model_70_type3_init(const machine_t *);
extern int machine_ps2_model_80_init(const machine_t *);
extern int machine_ps2_model_80_axx_init(const machine_t *);
/* m_tandy.c */
extern int tandy1k_eeprom_read(void);

View File

@@ -79,8 +79,9 @@ static struct
uint8_t subaddr_lo, subaddr_hi;
uint8_t memory_bank[8];
uint8_t io_id;
uint16_t planar_id;
mem_mapping_t shadow_mapping;
mem_mapping_t split_mapping;
@@ -331,9 +332,9 @@ static uint8_t model_70_type3_read(uint16_t port)
switch (port)
{
case 0x100:
return 0xff;
return ps2.planar_id & 0xff;
case 0x101:
return 0xf9;
return ps2.planar_id >> 8;
case 0x102:
return ps2.option[0];
case 0x103:
@@ -538,6 +539,14 @@ static void model_70_type3_write(uint16_t port, uint8_t val)
}
ps2.option[0] = val;
break;
case 0x103:
if (ps2.planar_id == 0xfff9)
ps2.option[1] = (ps2.option[1] & 0x0f) | (val & 0xf0);
break;
case 0x104:
if (ps2.planar_id == 0xfff9)
ps2.option[2] = val;
break;
case 0x105:
ps2.option[3] = val;
break;
@@ -653,7 +662,7 @@ uint8_t ps2_mca_read(uint16_t port, void *p)
temp = ps2.planar_read(port);
else if (!(ps2.setup & PS2_SETUP_VGA))
temp = ps2.pos_vga;
else if (ps2.adapter_setup & PS2_ADAPTER_SETUP)
else if (ps2.adapter_setup & PS2_ADAPTER_SETUP)
temp = mca_read(port);
else
temp = 0xff;
@@ -1103,12 +1112,12 @@ static void mem_encoding_write_cached(uint16_t addr, uint8_t val, void *p)
}
}
static void ps2_mca_board_model_70_type34_init(int is_type4)
static void ps2_mca_board_model_70_type34_init(int is_type4, int slots)
{
ps2_mca_board_common_init();
ps2.split_addr = mem_size * 1024;
mca_init(4);
mca_init(slots);
device_add(&keyboard_ps2_mca_device);
ps2.planar_read = model_70_type3_read;
@@ -1160,7 +1169,7 @@ static void ps2_mca_board_model_70_type34_init(int is_type4)
mem_mapping_add(&ps2.cache_mapping,
0,
is_type4 ? (8 * 1024) : (64 * 1024),
(is_type4) ? (8 * 1024) : (64 * 1024),
ps2_read_cache_ram,
ps2_read_cache_ramw,
ps2_read_cache_raml,
@@ -1171,12 +1180,20 @@ static void ps2_mca_board_model_70_type34_init(int is_type4)
MEM_MAPPING_INTERNAL,
NULL);
mem_mapping_disable(&ps2.cache_mapping);
if (mem_size > 8192)
{
/* Only 8 MB supported on planar, create a memory expansion card for the rest */
ps2_mca_mem_fffc_init(8);
}
if (ps2.planar_id == 0xfff9) {
if (mem_size > 4096)
{
/* Only 4 MB supported on planar, create a memory expansion card for the rest */
ps2_mca_mem_fffc_init(4);
}
} else {
if (mem_size > 8192)
{
/* Only 8 MB supported on planar, create a memory expansion card for the rest */
ps2_mca_mem_fffc_init(8);
}
}
if (gfxcard == VID_INTERNAL)
device_add(&ps1vga_mca_device);
@@ -1333,8 +1350,10 @@ machine_ps2_model_70_type3_init(const machine_t *model)
return ret;
machine_ps2_common_init(model);
ps2.planar_id = 0xf9ff;
ps2_mca_board_model_70_type34_init(0);
ps2_mca_board_model_70_type34_init(0, 4);
return ret;
}
@@ -1354,8 +1373,10 @@ machine_ps2_model_70_type4_init(const machine_t *model)
return ret;
machine_ps2_common_init(model);
ps2.planar_id = 0xfcff;
ps2_mca_board_model_70_type34_init(1);
ps2_mca_board_model_70_type34_init(1, 4);
return ret;
}
@@ -1380,3 +1401,24 @@ machine_ps2_model_80_init(const machine_t *model)
return ret;
}
int
machine_ps2_model_80_axx_init(const machine_t *model)
{
int ret;
ret = bios_load_interleaved("roms/machines/ibmps2_m80/64f4356.bin",
"roms/machines/ibmps2_m80/64f4355.bin",
0x000e0000, 131072, 0);
if (bios_only || !ret)
return ret;
machine_ps2_common_init(model);
ps2.planar_id = 0xfff9;
ps2_mca_board_model_70_type34_init(0, 8);
return ret;
}

View File

@@ -190,6 +190,7 @@ const machine_t machines[] = {
/* 386DX machines which utilize the MCA bus */
{ "[MCA] IBM PS/2 model 70 (type 3)", "ibmps2_m70_type3", MACHINE_TYPE_386DX, CPU_PKG_386DX | CPU_PKG_486BL, 0, 0, 0, 0, 0, 0, 0, MACHINE_MCA | MACHINE_BUS_PS2 | MACHINE_VIDEO, 2048, 16384, 2048, 63, machine_ps2_model_70_type3_init, NULL },
{ "[MCA] IBM PS/2 model 80", "ibmps2_m80", MACHINE_TYPE_386DX, CPU_PKG_386DX | CPU_PKG_486BL, 0, 0, 0, 0, 0, 0, 0, MACHINE_MCA | MACHINE_BUS_PS2 | MACHINE_VIDEO, 1024, 12288, 1024, 63, machine_ps2_model_80_init, NULL },
{ "[MCA] IBM PS/2 model 80 (type 3)", "ibmps2_m80_type3", MACHINE_TYPE_386DX, CPU_PKG_386DX | CPU_PKG_486BL, 0, 0, 0, 0, 0, 0, 0, MACHINE_MCA | MACHINE_BUS_PS2 | MACHINE_VIDEO, 2048, 12288, 2048, 63, machine_ps2_model_80_axx_init, NULL },
/* 386DX/486 machines */
{ "[OPTi 495] Award 486 clone", "award486", MACHINE_TYPE_386DX_486, CPU_PKG_386DX | CPU_PKG_SOCKET1, 0, 0, 0, 0, 0, 0, 0, MACHINE_VLB | MACHINE_IDE, 1024, 32768, 1024, 127, machine_at_opti495_init, NULL },

View File

@@ -353,38 +353,6 @@ static uint8_t s3_accel_in(uint16_t port, void *p);
static uint8_t s3_pci_read(int func, int addr, void *p);
static void s3_pci_write(int func, int addr, uint8_t val, void *p);
/*Remap address for chain-4/doubleword style layout*/
static __inline uint32_t
dword_remap(svga_t *svga, uint32_t in_addr)
{
if (svga->packed_chain4)
return in_addr;
return ((in_addr << 2) & 0x3fff0) |
((in_addr >> 14) & 0xc) |
(in_addr & ~0x3fffc);
}
static __inline uint32_t
dword_remap_w(svga_t *svga, uint32_t in_addr)
{
if (svga->packed_chain4)
return in_addr;
return ((in_addr << 2) & 0x1fff8) |
((in_addr >> 14) & 0x6) |
(in_addr & ~0x1fffe);
}
static __inline uint32_t
dword_remap_l(svga_t *svga, uint32_t in_addr)
{
if (svga->packed_chain4)
return in_addr;
return ((in_addr << 2) & 0xfffc) |
((in_addr >> 14) & 0x3) |
(in_addr & ~0xffff);
}
static __inline void
wake_fifo_thread(s3_t *s3)
{
@@ -503,15 +471,17 @@ s3_accel_out_pixtrans_w(s3_t *s3, uint16_t val)
s3_accel_start(8, 1, val | (val << 16), 0, s3);
} else if ((s3->accel.cmd & 0x400) && (svga->crtc[0x53] & 0x08))
s3_accel_start(32, 1, val | (val << 16), 0, s3);
else
else {
s3_accel_start(16, 1, val | (val << 16), 0, s3);
}
} else {
if ((s3->accel.cmd & 0x600) == 0x000)
s3_accel_start(1, 1, 0xffffffff, val | (val << 16), s3);
else if (s3->accel.cmd & 0x400)
s3_accel_start(4, 1, 0xffffffff, val | (val << 16), s3);
else
else {
s3_accel_start(2, 1, 0xffffffff, val | (val << 16), s3);
}
}
}
}
@@ -533,7 +503,7 @@ s3_accel_out_pixtrans_l(s3_t *s3, uint32_t val)
if (s3->accel.cmd & 0x1000)
val = ((val & 0xff000000) >> 24) | ((val & 0x00ff0000) >> 8) | ((val & 0x0000ff00) << 8) | ((val & 0x000000ff) << 24);
s3_accel_start(32, 1, val, 0, s3);
} else if ((s3->accel.cmd & 0x600) == 0x200) {
} else if ((s3->accel.cmd & 0x600) == 0x200) {
if (s3->accel.cmd & 0x1000)
val = ((val & 0xff00ff00) >> 8) | ((val & 0x00ff00ff) << 8);
s3_accel_start(16, 1, val, 0, s3);
@@ -547,7 +517,7 @@ s3_accel_out_pixtrans_l(s3_t *s3, uint32_t val)
} else {
if (s3->accel.cmd & 0x400) {
s3_accel_start(4, 1, 0xffffffff, val, s3);
} else if ((s3->accel.cmd & 0x600) == 0x200) {
} else if ((s3->accel.cmd & 0x600) == 0x200) {
s3_accel_start(2, 1, 0xffffffff, val, s3);
s3_accel_start(2, 1, 0xffffffff, val >> 16, s3);
} else {
@@ -1666,10 +1636,8 @@ s3_hwcursor_draw(svga_t *svga, int displine)
for (x = 0; x < 64; x += 16)
{
uint32_t remapped_addr = dword_remap(svga, svga->hwcursor_latch.addr);
dat[0] = (svga->vram[remapped_addr] << 8) | svga->vram[remapped_addr + 1];
dat[1] = (svga->vram[remapped_addr + 2] << 8) | svga->vram[remapped_addr + 3];
dat[0] = (svga->vram[svga->hwcursor_latch.addr] << 8) | svga->vram[svga->hwcursor_latch.addr + 1];
dat[1] = (svga->vram[svga->hwcursor_latch.addr + 2] << 8) | svga->vram[svga->hwcursor_latch.addr + 3];
if (svga->crtc[0x55] & 0x10) {
/*X11*/
for (xx = 0; xx < 16; xx++) {
@@ -1947,8 +1915,7 @@ static void s3_trio64v_overlay_draw(svga_t *svga, int displine)
int x_size, x_read = 4, x_write = 4;
int x;
uint32_t *p;
uint32_t remapped_addr = dword_remap(svga, svga->overlay_latch.addr);
uint8_t *src = &svga->vram[remapped_addr];
uint8_t *src = &svga->vram[svga->overlay_latch.addr];
p = &(buffer32->line[displine][offset + svga->x_add]);
@@ -2274,8 +2241,6 @@ s3_out(uint16_t addr, uint8_t val, void *p)
{
case 0x31:
s3->ma_ext = (s3->ma_ext & 0x1c) | ((val & 0x30) >> 4);
if (!svga->packed_chain4)
svga->force_dword_mode = !!(val & 0x08);
break;
case 0x32:
if (svga->crtc[0x31] & 0x30)
@@ -2605,6 +2570,10 @@ static void s3_recalctimings(svga_t *svga)
svga->lowres = !((svga->gdcreg[5] & 0x40) && (svga->crtc[0x3a] & 0x10));
if ((svga->gdcreg[5] & 0x40) && (svga->crtc[0x3a] & 0x10)) {
if (!(svga->crtc[0x14] & 0x40)) /*There are still accel issues with dword mode enabled, so
disable dword mode for now.*/
svga->crtc[0x14] |= 0x40;
switch (svga->bpp) {
case 8:
svga->render = svga_render_8bpp_highres;
@@ -2709,6 +2678,10 @@ static void s3_trio64v_recalctimings(svga_t *svga)
svga->lowres = !((svga->gdcreg[5] & 0x40) && (svga->crtc[0x3a] & 0x10));
if ((svga->gdcreg[5] & 0x40) && (svga->crtc[0x3a] & 0x10)) {
if (!(svga->crtc[0x14] & 0x40)) /*There are still accel issues with dword mode enabled, so
disable dword mode for now.*/
svga->crtc[0x14] |= 0x40;
switch (svga->bpp) {
case 8:
svga->render = svga_render_8bpp_highres;
@@ -3758,9 +3731,9 @@ polygon_setup(s3_t *s3)
}
#define READ(addr, dat) if (s3->bpp == 0) dat = svga->vram[dword_remap(svga, addr) & s3->vram_mask]; \
else if (s3->bpp == 1) dat = vram_w[dword_remap_w(svga, addr) & (s3->vram_mask >> 1)]; \
else dat = vram_l[dword_remap_l(svga, addr) & (s3->vram_mask >> 2)];
#define READ(addr, dat) if (s3->bpp == 0) dat = svga->vram[(addr) & s3->vram_mask]; \
else if (s3->bpp == 1) dat = vram_w[(addr) & (s3->vram_mask >> 1)]; \
else dat = vram_l[(addr) & (s3->vram_mask >> 2)];
#define MIX_READ { \
switch ((mix_dat & mix_mask) ? (s3->accel.frgd_mix & 0xf) : (s3->accel.bkgd_mix & 0xf)) \
@@ -4065,18 +4038,18 @@ polygon_setup(s3_t *s3)
#define WRITE(addr, dat) if (s3->bpp == 0) \
{ \
svga->vram[dword_remap(svga, addr) & s3->vram_mask] = dat; \
svga->changedvram[(dword_remap(svga, addr) & s3->vram_mask) >> 12] = changeframecount; \
svga->vram[(addr) & s3->vram_mask] = dat; \
svga->changedvram[((addr) & s3->vram_mask) >> 12] = changeframecount; \
} \
else if (s3->bpp == 1) \
{ \
vram_w[dword_remap_w(svga, addr) & (s3->vram_mask >> 1)] = dat; \
svga->changedvram[(dword_remap_w(svga, addr) & (s3->vram_mask >> 1)) >> 11] = changeframecount; \
vram_w[(addr) & (s3->vram_mask >> 1)] = dat; \
svga->changedvram[((addr) & (s3->vram_mask >> 1)) >> 11] = changeframecount; \
} \
else \
{ \
vram_l[dword_remap_l(svga, addr) & (s3->vram_mask >> 2)] = dat; \
svga->changedvram[(dword_remap_l(svga, addr) & (s3->vram_mask >> 2)) >> 10] = changeframecount; \
vram_l[(addr) & (s3->vram_mask >> 2)] = dat; \
svga->changedvram[((addr) & (s3->vram_mask >> 2)) >> 10] = changeframecount; \
}
@@ -6111,8 +6084,7 @@ static void *s3_init(const device_t *info)
svga->crtc[0x59] = 0x00;
svga->crtc[0x5a] = 0x0a;
}
svga->packed_chain4 = 1;
svga->ramdac = device_add(&ibm_rgb528_ramdac_device);
svga->clock_gen = device_add(&icd2061_device);
svga->getclock = icd2061_getclock;
@@ -6135,7 +6107,6 @@ static void *s3_init(const device_t *info)
svga->crtc[0x59] = 0x00;
svga->crtc[0x5a] = 0x0a;
}
svga->packed_chain4 = 1;
svga->ramdac = device_add(&sdac_ramdac_device);
svga->clock_gen = svga->ramdac;
@@ -6159,7 +6130,7 @@ static void *s3_init(const device_t *info)
case S3_PHOENIX_TRIO64VPLUS_ONBOARD:
case S3_DIAMOND_STEALTH64_764:
if (device_get_config_int("memory") == 1)
s3->svga.vram_max = 1 << 20; /* Phoenix BIOS does not expect VRAM to be mirrored. */
svga->vram_max = 1 << 20; /* Phoenix BIOS does not expect VRAM to be mirrored. */
/* Fall over. */
case S3_NUMBER9_9FX:
@@ -6171,7 +6142,6 @@ static void *s3_init(const device_t *info)
if (info->local == S3_PHOENIX_TRIO64VPLUS || info->local == S3_PHOENIX_TRIO64VPLUS_ONBOARD) {
if (s3->pci)
svga->crtc[0x53] = 0x08;
svga->packed_chain4 = 1;
}
svga->clock_gen = s3;
@@ -6185,7 +6155,6 @@ static void *s3_init(const device_t *info)
s3->packed_mmio = 1;
svga->crtc[0x53] = 0x08;
svga->crtc[0x6c] = 1;
svga->packed_chain4 = 1;
svga->clock_gen = s3;
svga->getclock = s3_trio64_getclock;
@@ -6197,6 +6166,8 @@ static void *s3_init(const device_t *info)
s3->i2c = i2c_gpio_init("ddc_s3");
s3->ddc = ddc_init(i2c_gpio_get_bus(s3->i2c));
svga->packed_chain4 = 1;
return s3;
}