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Changes list 5:

Browse Source 
Added the AT&T 2xc498 Precision RAMDAC.
Added 1MB configurations to the Cirrus Logic GD5434 as well as re-organized the memory size options of the other Cirrus cards.
Separated the et4000w32/i blitter from the standard et4000w32p blitter and properly implemented the X/Y Count route.
Added several Diamond Cirrus cards.
Added Number Nine S3 cards (868 and 968-based).
Fixed the WD90c30 1MB modes.
Re-organized the video card names.
This commit is contained in:
TC1995
2021-11-18 23:58:04 +01:00
parent 5d6dbc8f0d
commit e29dafa17a
10 changed files with 1747 additions and 589 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
src/include/86box/vid_svga.h
View File

@@ -226,6 +226,8 @@ extern void ati68860_hwcursor_draw(svga_t *svga, int displine);
extern void att49x_ramdac_out(uint16_t addr, int rs2, uint8_t val, void *p, svga_t *svga);
extern uint8_t att49x_ramdac_in(uint16_t addr, int rs2, void *p, svga_t *svga);
extern void att498_ramdac_out(uint16_t addr, int rs2, uint8_t val, void *p, svga_t *svga);
extern uint8_t att498_ramdac_in(uint16_t addr, int rs2, void *p, svga_t *svga);
extern float av9194_getclock(int clock, void *p);
extern void bt48x_ramdac_out(uint16_t addr, int rs2, int rs3, uint8_t val, void *p, svga_t *svga);
@@ -278,6 +280,7 @@ extern const device_t ati68860_ramdac_device;
extern const device_t att490_ramdac_device;
extern const device_t att491_ramdac_device;
extern const device_t att492_ramdac_device;
extern const device_t att498_ramdac_device;
extern const device_t av9194_device;
extern const device_t bt484_ramdac_device;
extern const device_t att20c504_ramdac_device;

10
src/include/86box/video.h
View File

@@ -226,24 +226,28 @@ extern const device_t compaq_ati28800_device;
extern const device_t ati28800_wonderxl24_device;
#endif
/* Cirrus Logic CL-GD 54xx */
/* Cirrus Logic GD54xx */
extern const device_t gd5401_isa_device;
extern const device_t gd5402_isa_device;
extern const device_t gd5402_onboard_device;
extern const device_t gd5420_isa_device;
extern const device_t gd5422_isa_device;
extern const device_t gd5424_vlb_device;
extern const device_t gd5426_isa_device;
extern const device_t gd5426_diamond_speedstar_pro_a1_isa_device;
extern const device_t gd5426_vlb_device;
extern const device_t gd5426_onboard_device;
extern const device_t gd5428_isa_device;
extern const device_t gd5428_vlb_device;
extern const device_t gd5428_diamond_speedstar_pro_b1_vlb_device;
extern const device_t gd5428_mca_device;
extern const device_t gd5428_onboard_device;
extern const device_t gd5429_isa_device;
extern const device_t gd5429_vlb_device;
extern const device_t gd5430_vlb_device;
extern const device_t gd5430_diamond_speedstar_pro_se_a8_vlb_device;
extern const device_t gd5430_pci_device;
extern const device_t gd5434_isa_device;
extern const device_t gd5434_diamond_speedstar_64_a3_isa_device;
extern const device_t gd5434_onboard_pci_device;
extern const device_t gd5434_vlb_device;
extern const device_t gd5434_pci_device;
@@ -369,6 +373,7 @@ extern const device_t s3_mirocrystal_20sv_964_pci_device;
extern const device_t s3_mirocrystal_20sd_864_vlb_device;
extern const device_t s3_phoenix_vision864_pci_device;
extern const device_t s3_phoenix_vision864_vlb_device;
extern const device_t s3_9fx_531_pci_device;
extern const device_t s3_phoenix_vision868_pci_device;
extern const device_t s3_phoenix_vision868_vlb_device;
extern const device_t s3_diamond_stealth64_pci_device;
@@ -376,6 +381,7 @@ extern const device_t s3_diamond_stealth64_vlb_device;
extern const device_t s3_diamond_stealth64_964_pci_device;
extern const device_t s3_diamond_stealth64_964_vlb_device;
extern const device_t s3_mirovideo_40sv_ergo_968_pci_device;
extern const device_t s3_9fx_771_pci_device;
extern const device_t s3_phoenix_vision968_pci_device;
extern const device_t s3_phoenix_vision968_vlb_device;
extern const device_t s3_spea_mercury_p64v_pci_device;

2
src/video/CMakeLists.txt
View File

@@ -24,7 +24,7 @@ add_library(vid OBJECT agpgart.c video.c vid_table.c vid_cga.c vid_cga_comp.c
vid_stg_ramdac.c vid_ht216.c vid_oak_oti.c vid_paradise.c vid_rtg310x.c
vid_f82c425.c vid_ti_cf62011.c vid_tvga.c vid_tgui9440.c vid_tkd8001_ramdac.c
vid_att20c49x_ramdac.c vid_s3.c vid_s3_virge.c vid_ibm_rgb528_ramdac.c
vid_sdac_ramdac.c vid_ogc.c vid_nga.c vid_tvp3026_ramdac.c)
vid_sdac_ramdac.c vid_ogc.c vid_nga.c vid_tvp3026_ramdac.c vid_att2xc498_ramdac.c)
if(MGA)
target_compile_definitions(vid PRIVATE USE_MGA)

186
src/video/vid_att2xc498_ramdac.c Normal file
View File

@@ -0,0 +1,186 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Emulation of a AT&T 2xc498 RAMDAC.
*
*
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2008-2018 Sarah Walker.
* Copyright 2016-2018 Miran Grca.
*/
#include <stdio.h>
#include <stdint.h>
#include <stdlib.h>
#include <string.h>
#include <wchar.h>
#include <86box/86box.h>
#include <86box/device.h>
#include <86box/mem.h>
#include <86box/timer.h>
#include <86box/video.h>
#include <86box/vid_svga.h>
typedef struct
{
int type;
int state;
int loop;
uint8_t ctrl;
} att498_ramdac_t;
static void
att498_ramdac_control(uint8_t val, void *p, svga_t *svga)
{
att498_ramdac_t *ramdac = (att498_ramdac_t *) p;
ramdac->ctrl = val;
if (val == 0xff)
return;
switch ((ramdac->ctrl >> 4) & 0x0f) {
default:
svga->bpp = 8;
break;
case 1:
if (ramdac->ctrl & 4)
svga->bpp = 15;
else
svga->bpp = 8;
break;
case 3:
case 6:
svga->bpp = 16;
break;
case 5:
case 7:
svga->bpp = 32;
break;
case 0x0e:
svga->bpp = 24;
break;
}
svga_set_ramdac_type(svga, (ramdac->ctrl & 2) ? RAMDAC_8BIT : RAMDAC_6BIT);
svga_recalctimings(svga);
}
void
att498_ramdac_out(uint16_t addr, int rs2, uint8_t val, void *p, svga_t *svga)
{
att498_ramdac_t *ramdac = (att498_ramdac_t *) p;
uint8_t rs = (addr & 0x03);
rs |= ((!!rs2) << 2);
switch (rs) {
case 0x00:
case 0x01:
case 0x03:
case 0x04:
case 0x05:
case 0x07:
svga_out(addr, val, svga);
ramdac->state = 0;
break;
case 0x02:
switch (ramdac->state) {
case 4:
att498_ramdac_control(val, ramdac, svga);
break;
default:
svga_out(addr, val, svga);
break;
}
break;
case 0x06:
att498_ramdac_control(val, ramdac, svga);
break;
}
}
uint8_t
att498_ramdac_in(uint16_t addr, int rs2, void *p, svga_t *svga)
{
att498_ramdac_t *ramdac = (att498_ramdac_t *) p;
uint8_t temp = 0xff;
uint8_t rs = (addr & 0x03);
rs |= ((!!rs2) << 2);
switch (rs) {
case 0x00:
case 0x01:
case 0x03:
case 0x04:
case 0x05:
case 0x07:
temp = svga_in(addr, svga);
ramdac->state = 0;
break;
case 0x02:
switch (ramdac->state) {
case 4:
temp = ramdac->ctrl;
ramdac->state++;
break;
case 5:
temp = 0x84;
ramdac->state++;
break;
case 6:
temp = ramdac->ctrl;
ramdac->state = 0;
break;
default:
temp = svga_in(addr, svga);
ramdac->state++;
break;
}
break;
case 0x06:
temp = ramdac->ctrl;
ramdac->state = 0;
break;
}
return temp;
}
static void *
att498_ramdac_init(const device_t *info)
{
att498_ramdac_t *ramdac = (att498_ramdac_t *) malloc(sizeof(att498_ramdac_t));
memset(ramdac, 0, sizeof(att498_ramdac_t));
ramdac->type = info->local;
return ramdac;
}
static void
att498_ramdac_close(void *priv)
{
att498_ramdac_t *ramdac = (att498_ramdac_t *) priv;
if (ramdac)
free(ramdac);
}
const device_t att498_ramdac_device =
{
"AT&T 22c498 RAMDAC",
0, 0,
att498_ramdac_init, att498_ramdac_close,
NULL, { NULL }, NULL, NULL
};

476
src/video/vid_cl54xx.c
View File

@@ -45,13 +45,15 @@
#define BIOS_GD5402_ONBOARD_PATH "roms/machines/cbm_sl386sx25/c000.rom"
#define BIOS_GD5420_PATH "roms/video/cirruslogic/5420.vbi"
#define BIOS_GD5422_PATH "roms/video/cirruslogic/cl5422.bin"
#define BIOS_GD5426_PATH "roms/video/cirruslogic/Diamond SpeedStar PRO VLB v3.04.bin"
#define BIOS_GD5426_DIAMOND_A1_ISA_PATH "roms/video/cirruslogic/diamond5426.bin"
#define BIOS_GD5428_DIAMOND_B1_VLB_PATH "roms/video/cirruslogic/Diamond SpeedStar PRO VLB v3.04.bin"
#define BIOS_GD5428_ISA_PATH "roms/video/cirruslogic/5428.bin"
#define BIOS_GD5428_MCA_PATH "roms/video/cirruslogic/SVGA141.ROM"
#define BIOS_GD5428_PATH "roms/video/cirruslogic/vlbusjapan.BIN"
#define BIOS_GD5429_PATH "roms/video/cirruslogic/5429.vbi"
#define BIOS_GD5430_VLB_PATH "roms/video/cirruslogic/diamondvlbus.bin"
#define BIOS_GD5430_PCI_PATH "roms/video/cirruslogic/pci.bin"
#define BIOS_GD5430_DIAMOND_A8_VLB_PATH "roms/video/cirruslogic/diamondvlbus.bin"
#define BIOS_GD5430_PATH "roms/video/cirruslogic/pci.bin"
#define BIOS_GD5434_DIAMOND_A3_ISA_PATH "roms/video/cirruslogic/Diamond Multimedia SpeedStar 64 v2.02 EPROM Backup from ST M27C256B-12F1.BIN"
#define BIOS_GD5434_PATH "roms/video/cirruslogic/gd5434.bin"
#define BIOS_GD5436_PATH "roms/video/cirruslogic/5436.vbi"
#define BIOS_GD5440_PATH "roms/video/cirruslogic/BIOS.BIN"
@@ -1209,11 +1211,62 @@ gd54xx_in(uint16_t addr, void *p)
ret |= 0x80;
}
break;
case 0x0a: /*Scratch Pad 1 (Memory size for 5402/542x)*/
ret = svga->seqregs[0x0a] & ~0x1a;
if (svga->crtc[0x27] == CIRRUS_ID_CLGD5402) {
ret |= 0x01; /*512K of memory*/
} else if (svga->crtc[0x27] > CIRRUS_ID_CLGD5402) {
switch (gd54xx->vram_size >> 10) {
case 512:
ret |= 0x08;
break;
case 1024:
ret |= 0x10;
break;
case 2048:
ret |= 0x18;
break;
}
}
break;
case 0x0b: case 0x0c: case 0x0d: case 0x0e:
ret = gd54xx->vclk_n[svga->seqaddr-0x0b];
break;
case 0x0f: /*DRAM control*/
ret = svga->seqregs[0x0f] & ~0x98;
switch (gd54xx->vram_size >> 10) {
case 512:
ret |= 0x08; /*16-bit DRAM data bus width*/
break;
case 1024:
ret |= 0x10; /*32-bit DRAM data bus width for 1M of memory*/
break;
case 2048:
ret |= (gd54xx_is_5434(svga)) ? 0x98 : 0x18; /*32-bit (Pre-5434)/64-bit (5434 and up) DRAM data bus width for 2M of memory*/
break;
case 4096:
ret |= 0x98; /*64-bit (5434 and up) DRAM data bus width for 4M of memory*/
break;
}
break;
case 0x15: /*Scratch Pad 3 (Memory size for 543x)*/
ret = svga->seqregs[0x15] & ~0x0f;
if (svga->crtc[0x27] >= CIRRUS_ID_CLGD5430) {
switch (gd54xx->vram_size >> 20) {
case 1:
ret |= 0x02;
break;
case 2:
ret |= 0x03;
break;
case 4:
ret |= 0x04;
break;
}
}
break;
case 0x17:
ret = svga->gdcreg[0x17] & ~(7 << 3);
ret = svga->seqregs[0x17] & ~(7 << 3);
if (svga->crtc[0x27] <= CIRRUS_ID_CLGD5429) {
if ((svga->crtc[0x27] == CIRRUS_ID_CLGD5428) || (svga->crtc[0x27] == CIRRUS_ID_CLGD5426)) {
if (gd54xx->vlb)
@@ -3844,17 +3897,29 @@ static void
case CIRRUS_ID_CLGD5426:
if (info->local & 0x200)
romfn = NULL;
else
romfn = BIOS_GD5426_PATH;
else {
if (info->local & 0x100)
romfn = BIOS_GD5426_DIAMOND_A1_ISA_PATH;
else {
if (gd54xx->vlb)
romfn = BIOS_GD5428_PATH;
else
romfn = BIOS_GD5428_ISA_PATH;
}
}
break;
case CIRRUS_ID_CLGD5428:
if (gd54xx->vlb)
romfn = BIOS_GD5428_PATH;
else if (gd54xx->mca)
romfn = BIOS_GD5428_MCA_PATH;
else
romfn = BIOS_GD5428_ISA_PATH;
if (info->local & 0x100)
romfn = BIOS_GD5428_DIAMOND_B1_VLB_PATH;
else {
if (gd54xx->vlb)
romfn = BIOS_GD5428_PATH;
else if (gd54xx->mca)
romfn = BIOS_GD5428_MCA_PATH;
else
romfn = BIOS_GD5428_ISA_PATH;
}
break;
case CIRRUS_ID_CLGD5429:
@@ -3873,8 +3938,12 @@ static void
if (info->local & 0x200) {
romfn = NULL;
gd54xx->has_bios = 0;
} else
romfn = BIOS_GD5434_PATH;
} else {
if (info->local & 0x100)
romfn = BIOS_GD5434_DIAMOND_A3_ISA_PATH;
else
romfn = BIOS_GD5434_PATH;
}
break;
case CIRRUS_ID_CLGD5436:
@@ -3896,9 +3965,9 @@ static void
romfn = NULL;
gd54xx->has_bios = 0;
} else if (gd54xx->pci)
romfn = BIOS_GD5430_PCI_PATH;
romfn = BIOS_GD5430_PATH;
else
romfn = BIOS_GD5430_VLB_PATH;
romfn = BIOS_GD5430_DIAMOND_A8_VLB_PATH;
}
break;
@@ -3915,23 +3984,24 @@ static void
}
if (info->flags & DEVICE_MCA) {
vram = 1;
gd54xx->vram_size = 1 << 20;
vram = 1024;
gd54xx->vram_size = vram << 10;
} else {
if (id >= CIRRUS_ID_CLGD5420) {
if (id <= CIRRUS_ID_CLGD5428) {
if ((id == CIRRUS_ID_CLGD5426) && (info->local & 0x200))
vram = 1;
vram = 1024;
else if (id == CIRRUS_ID_CLGD5401)
vram = 256;
else if (id == CIRRUS_ID_CLGD5402)
vram = 512;
else
vram = device_get_config_int("memory");
} else
vram = 0;
if (vram)
gd54xx->vram_size = vram << 20;
else
gd54xx->vram_size = 1 << 19;
gd54xx->vram_size = vram << 10;
} else {
vram = device_get_config_int("memory");
gd54xx->vram_size = vram << 20;
}
}
gd54xx->vram_mask = gd54xx->vram_size - 1;
if (romfn)
@@ -3955,8 +4025,8 @@ static void
}
svga->vblank_start = gd54xx_vblank_start;
svga->ven_write = gd54xx_write_modes45;
if (vram <= 1)
svga->decode_mask = gd54xx->vram_mask;
if ((vram == 1) || (vram >= 256 && vram <= 1024))
svga->decode_mask = gd54xx->vram_mask;
if (gd54xx->bit32) {
mem_mapping_set_handler(&svga->mapping, gd54xx_read, gd54xx_readw, gd54xx_readl, gd54xx_write, gd54xx_writew, gd54xx_writel);
@@ -4039,6 +4109,7 @@ static void
svga->crtc[0x27] = id;
svga->seqregs[6] = 0x0f;
if (svga->crtc[0x27] >= CIRRUS_ID_CLGD5429)
gd54xx->unlocked = 1;
@@ -4089,9 +4160,9 @@ gd5422_available(void)
}
static int
gd5426_available(void)
gd5426_diamond_a1_available(void)
{
return rom_present(BIOS_GD5426_PATH);
return rom_present(BIOS_GD5426_DIAMOND_A1_ISA_PATH);
}
static int
@@ -4100,6 +4171,12 @@ gd5428_available(void)
return rom_present(BIOS_GD5428_PATH);
}
static int
gd5428_diamond_b1_available(void)
{
return rom_present(BIOS_GD5428_DIAMOND_B1_VLB_PATH);
}
static int
gd5428_isa_available(void)
{
@@ -4119,15 +4196,15 @@ gd5429_available(void)
}
static int
gd5430_vlb_available(void)
gd5430_diamond_a8_available(void)
{
return rom_present(BIOS_GD5430_VLB_PATH);
return rom_present(BIOS_GD5430_DIAMOND_A8_VLB_PATH);
}
static int
gd5430_pci_available(void)
gd5430_available(void)
{
return rom_present(BIOS_GD5430_PCI_PATH);
return rom_present(BIOS_GD5430_PATH);
}
static int
@@ -4136,6 +4213,12 @@ gd5434_available(void)
return rom_present(BIOS_GD5434_PATH);
}
static int
gd5434_diamond_a3_available(void)
{
return rom_present(BIOS_GD5434_DIAMOND_A3_ISA_PATH);
}
static int
gd5436_available(void)
{
@@ -4199,28 +4282,96 @@ gd54xx_force_redraw(void *p)
gd54xx->svga.fullchange = changeframecount;
}
static const device_config_t gd5422_config[] =
static const device_config_t gd542x_config[] =
{
{
"memory","Memory size",CONFIG_SELECTION,"", 1, "", { 0 },
.name = "memory",
.description = "Memory size",
.type = CONFIG_SELECTION,
.selection =
{
{
"512 KB", 0
.description = "512 KB",
.value = 512
},
{
"1 MB", 1
.description = "1 MB",
.value = 1024
},
{
""
.description = ""
}
},
.default_int = 512
},
{
"", "", -1
.type = -1
}
};
static const device_config_t gd5428_config[] =
static const device_config_t gd5426_config[] =
{
{
.name = "memory",
.description = "Memory size",
.type = CONFIG_SELECTION,
.selection =
{
{
.description = "512 KB",
.value = 512
},
{
.description = "1 MB",
.value = 1024
},
{
.description = "2 MB",
.value = 2048
},
{
.description = ""
}
},
.default_int = 2048
},
{
.type = -1
}
};
static const device_config_t gd5428_onboard_config[] =
{
{
.name = "memory",
.description = "Onboard memory size",
.type = CONFIG_SELECTION,
.selection =
{
{
.description = "512 KB",
.value = 512
},
{
.description = "1 MB",
.value = 1024
},
{
.description = "2 MB",
.value = 2048
},
{
.description = ""
}
},
.default_int = 2048
},
{
.type = -1
}
};
static const device_config_t gd5429_config[] =
{
{
.name = "memory",
@@ -4247,38 +4398,11 @@ static const device_config_t gd5428_config[] =
}
};
static const device_config_t gd5428_onboard_config[] =
{
{
.name = "memory",
.description = "Onboard Video RAM size",
.type = CONFIG_SELECTION,
.selection =
{
{
.description = "1 MB",
.value = 1
},
{
.description = "2 MB",
.value = 2
},
{
.description = ""
}
},
.default_int = 2
},
{
.type = -1
}
};
static const device_config_t gd5440_onboard_config[] =
{
{
.name = "memory",
.description = "Video memory size",
.description = "Onboard memory size",
.type = CONFIG_SELECTION,
.selection =
{
@@ -4302,6 +4426,68 @@ static const device_config_t gd5440_onboard_config[] =
};
static const device_config_t gd5434_config[] =
{
{
.name = "memory",
.description = "Memory size",
.type = CONFIG_SELECTION,
.selection =
{
{
.description = "1 MB",
.value = 1
},
{
.description = "2 MB",
.value = 2
},
{
.description = "4 MB",
.value = 4
},
{
.description = ""
}
},
.default_int = 4
},
{
.type = -1
}
};
static const device_config_t gd5434_onboard_config[] =
{
{
.name = "memory",
.description = "Onboard memory size",
.type = CONFIG_SELECTION,
.selection =
{
{
.description = "1 MB",
.value = 1
},
{
.description = "2 MB",
.value = 2
},
{
.description = "4 MB",
.value = 4
},
{
.description = ""
}
},
.default_int = 4
},
{
.type = -1
}
};
static const device_config_t gd5480_config[] =
{
{
.name = "memory",
@@ -4330,7 +4516,7 @@ static const device_config_t gd5434_config[] =
const device_t gd5401_isa_device =
{
"Cirrus Logic GD-5401 (ACUMOS AVGA1)",
"Cirrus Logic GD5401 (ISA) (ACUMOS AVGA1)",
DEVICE_ISA,
CIRRUS_ID_CLGD5401,
gd54xx_init, gd54xx_close,
@@ -4343,7 +4529,7 @@ const device_t gd5401_isa_device =
const device_t gd5402_isa_device =
{
"Cirrus Logic GD-5402 (ACUMOS AVGA2)",
"Cirrus Logic GD5402 (ISA) (ACUMOS AVGA2)",
DEVICE_ISA,
CIRRUS_ID_CLGD5402,
gd54xx_init, gd54xx_close,
@@ -4356,7 +4542,7 @@ const device_t gd5402_isa_device =
const device_t gd5402_onboard_device =
{
"Cirrus Logic GD-5402 (ACUMOS AVGA2) (On-Board)",
"Cirrus Logic GD5402 (ISA) (ACUMOS AVGA2) (On-Board)",
DEVICE_AT | DEVICE_ISA,
CIRRUS_ID_CLGD5402 | 0x200,
gd54xx_init, gd54xx_close,
@@ -4369,7 +4555,7 @@ const device_t gd5402_onboard_device =
const device_t gd5420_isa_device =
{
"Cirrus Logic GD-5420",
"Cirrus Logic GD5420 (ISA)",
DEVICE_AT | DEVICE_ISA,
CIRRUS_ID_CLGD5420,
gd54xx_init, gd54xx_close,
@@ -4377,11 +4563,11 @@ const device_t gd5420_isa_device =
{ gd5420_available },
gd54xx_speed_changed,
gd54xx_force_redraw,
gd5422_config,
gd542x_config,
};
const device_t gd5422_isa_device = {
"Cirrus Logic GD-5422",
"Cirrus Logic GD5422 (ISA)",
DEVICE_AT | DEVICE_ISA,
CIRRUS_ID_CLGD5422,
gd54xx_init, gd54xx_close,
@@ -4389,11 +4575,11 @@ const device_t gd5422_isa_device = {
{ gd5422_available }, /* Common BIOS between 5422 and 5424 */
gd54xx_speed_changed,
gd54xx_force_redraw,
gd5422_config,
gd542x_config,
};
const device_t gd5424_vlb_device = {
"Cirrus Logic GD-5424",
"Cirrus Logic GD5424 (VLB)",
DEVICE_VLB,
CIRRUS_ID_CLGD5424,
gd54xx_init, gd54xx_close,
@@ -4401,26 +4587,57 @@ const device_t gd5424_vlb_device = {
{ gd5422_available }, /* Common BIOS between 5422 and 5424 */
gd54xx_speed_changed,
gd54xx_force_redraw,
gd5422_config,
gd542x_config,
};
const device_t gd5426_isa_device =
{
"Cirrus Logic GD5426 (ISA)",
DEVICE_AT | DEVICE_ISA,
CIRRUS_ID_CLGD5426,
gd54xx_init,
gd54xx_close,
gd54xx_reset,
{ gd5428_isa_available },
gd54xx_speed_changed,
gd54xx_force_redraw,
gd5426_config
};
/*According to a Diamond bios file listing and vgamuseum*/
const device_t gd5426_diamond_speedstar_pro_a1_isa_device =
{
"Cirrus Logic GD5426 (ISA) (Diamond SpeedStar Pro Rev. A1)",
DEVICE_AT | DEVICE_ISA,
CIRRUS_ID_CLGD5426 | 0x100,
gd54xx_init,
gd54xx_close,
gd54xx_reset,
{ gd5426_diamond_a1_available },
gd54xx_speed_changed,
gd54xx_force_redraw,
gd5426_config
};
const device_t gd5426_vlb_device =
{
"Cirrus Logic CL-GD 5426 (VLB)",
"Cirrus Logic GD5426 (VLB)",
DEVICE_VLB,
CIRRUS_ID_CLGD5426,
gd54xx_init,
gd54xx_close,
gd54xx_reset,
{ gd5426_available },
{ gd5428_available },
gd54xx_speed_changed,
gd54xx_force_redraw,
gd5428_config
gd5426_config
};
const device_t gd5426_onboard_device =
{
"Cirrus Logic CL-GD 5426 (On-board)",
"Cirrus Logic GD5426 (VLB) (On-Board)",
DEVICE_VLB,
CIRRUS_ID_CLGD5426 | 0x200,
gd54xx_init,
@@ -4434,7 +4651,7 @@ const device_t gd5426_onboard_device =
const device_t gd5428_isa_device =
{
"Cirrus Logic CL-GD 5428 (ISA)",
"Cirrus Logic GD5428 (ISA)",
DEVICE_AT | DEVICE_ISA,
CIRRUS_ID_CLGD5428,
gd54xx_init,
@@ -4443,12 +4660,12 @@ const device_t gd5428_isa_device =
{ gd5428_isa_available },
gd54xx_speed_changed,
gd54xx_force_redraw,
gd5428_config
gd5426_config
};
const device_t gd5428_vlb_device =
{
"Cirrus Logic CL-GD 5428 (VLB)",
"Cirrus Logic GD5428 (VLB)",
DEVICE_VLB,
CIRRUS_ID_CLGD5428,
gd54xx_init,
@@ -4457,12 +4674,27 @@ const device_t gd5428_vlb_device =
{ gd5428_available },
gd54xx_speed_changed,
gd54xx_force_redraw,
gd5428_config
gd5426_config
};
/*According to a Diamond bios file listing and vgamuseum*/
const device_t gd5428_diamond_speedstar_pro_b1_vlb_device =
{
"Cirrus Logic GD5428 (VLB) (Diamond SpeedStar Pro Rev. B1)",
DEVICE_VLB,
CIRRUS_ID_CLGD5428 | 0x100,
gd54xx_init,
gd54xx_close,
gd54xx_reset,
{ gd5428_diamond_b1_available },
gd54xx_speed_changed,
gd54xx_force_redraw,
gd5426_config
};
const device_t gd5428_mca_device =
{
"Cirrus Logic CL-GD 5428 (IBM SVGA Adapter/A)",
"Cirrus Logic GD5428 (MCA) (IBM SVGA Adapter/A)",
DEVICE_MCA,
CIRRUS_ID_CLGD5428,
gd54xx_init,
@@ -4476,7 +4708,7 @@ const device_t gd5428_mca_device =
const device_t gd5428_onboard_device =
{
"Cirrus Logic CL-GD 5428 (On-Board)",
"Cirrus Logic GD5428 (ISA) (On-Board)",
DEVICE_AT | DEVICE_ISA,
CIRRUS_ID_CLGD5428,
gd54xx_init,
@@ -4490,7 +4722,7 @@ const device_t gd5428_onboard_device =
const device_t gd5429_isa_device =
{
"Cirrus Logic CL-GD 5429 (ISA)",
"Cirrus Logic GD5429 (ISA)",
DEVICE_AT | DEVICE_ISA,
CIRRUS_ID_CLGD5429,
gd54xx_init,
@@ -4499,12 +4731,12 @@ const device_t gd5429_isa_device =
{ gd5429_available },
gd54xx_speed_changed,
gd54xx_force_redraw,
gd5428_config
gd5429_config
};
const device_t gd5429_vlb_device =
{
"Cirrus Logic CL-GD 5429 (VLB)",
"Cirrus Logic GD5429 (VLB)",
DEVICE_VLB,
CIRRUS_ID_CLGD5429,
gd54xx_init,
@@ -4513,40 +4745,41 @@ const device_t gd5429_vlb_device =
{ gd5429_available },
gd54xx_speed_changed,
gd54xx_force_redraw,
gd5428_config
gd5429_config
};
const device_t gd5430_vlb_device =
/*According to a Diamond bios file listing and vgamuseum*/
const device_t gd5430_diamond_speedstar_pro_se_a8_vlb_device =
{
"Cirrus Logic CL-GD 5430 (VLB)",
"Cirrus Logic GD5430 (VLB) (Diamond SpeedStar Pro SE Rev. A8)",
DEVICE_VLB,
CIRRUS_ID_CLGD5430,
gd54xx_init,
gd54xx_close,
gd54xx_reset,
{ gd5430_vlb_available },
{ gd5430_diamond_a8_available },
gd54xx_speed_changed,
gd54xx_force_redraw,
gd5428_config
gd5429_config
};
const device_t gd5430_pci_device =
{
"Cirrus Logic CL-GD 5430 (PCI)",
"Cirrus Logic GD5430 (PCI)",
DEVICE_PCI,
CIRRUS_ID_CLGD5430,
gd54xx_init,
gd54xx_close,
gd54xx_reset,
{ gd5430_pci_available },
{ gd5430_available },
gd54xx_speed_changed,
gd54xx_force_redraw,
gd5428_config
gd5429_config
};
const device_t gd5434_isa_device =
{
"Cirrus Logic CL-GD 5434 (ISA)",
"Cirrus Logic GD5434 (ISA)",
DEVICE_AT | DEVICE_ISA,
CIRRUS_ID_CLGD5434,
gd54xx_init,
@@ -4558,9 +4791,24 @@ const device_t gd5434_isa_device =
gd5434_config
};
/*According to a Diamond bios file listing and vgamuseum*/
const device_t gd5434_diamond_speedstar_64_a3_isa_device =
{
"Cirrus Logic GD5434 (ISA) (Diamond SpeedStar 64 Rev. A3)",
DEVICE_AT | DEVICE_ISA,
CIRRUS_ID_CLGD5434 | 0x100,
gd54xx_init,
gd54xx_close,
gd54xx_reset,
{ gd5434_diamond_a3_available },
gd54xx_speed_changed,
gd54xx_force_redraw,
gd5429_config
};
const device_t gd5434_onboard_pci_device =
{
"Cirrus Logic CL-GD 5434-4 (On-Board PCI)",
"Cirrus Logic GD5434-4 (PCI) (On-Board)",
DEVICE_PCI,
CIRRUS_ID_CLGD5434 | 0x200,
gd54xx_init,
@@ -4569,12 +4817,12 @@ const device_t gd5434_onboard_pci_device =
{ NULL },
gd54xx_speed_changed,
gd54xx_force_redraw,
gd5434_config
gd5434_onboard_config
};
const device_t gd5434_vlb_device =
{
"Cirrus Logic CL-GD 5434 (VLB)",
"Cirrus Logic GD5434 (VLB)",
DEVICE_VLB,
CIRRUS_ID_CLGD5434,
gd54xx_init,
@@ -4588,7 +4836,7 @@ const device_t gd5434_vlb_device =
const device_t gd5434_pci_device =
{
"Cirrus Logic CL-GD 5434 (PCI)",
"Cirrus Logic GD5434 (PCI)",
DEVICE_PCI,
CIRRUS_ID_CLGD5434,
gd54xx_init,
@@ -4602,7 +4850,7 @@ const device_t gd5434_pci_device =
const device_t gd5436_pci_device =
{
"Cirrus Logic CL-GD 5436 (PCI)",
"Cirrus Logic GD5436 (PCI)",
DEVICE_PCI,
CIRRUS_ID_CLGD5436,
gd54xx_init,
@@ -4616,7 +4864,7 @@ const device_t gd5436_pci_device =
const device_t gd5440_onboard_pci_device =
{
"Cirrus Logic CL-GD 5440 (On-Board PCI)",
"Cirrus Logic GD5440 (PCI) (On-Board)",
DEVICE_PCI,
CIRRUS_ID_CLGD5440 | 0x600,
gd54xx_init,
@@ -4630,7 +4878,7 @@ const device_t gd5440_onboard_pci_device =
const device_t gd5440_pci_device =
{
"Cirrus Logic CL-GD 5440 (PCI)",
"Cirrus Logic GD5440 (PCI)",
DEVICE_PCI,
CIRRUS_ID_CLGD5440 | 0x400,
gd54xx_init,
@@ -4639,12 +4887,12 @@ const device_t gd5440_pci_device =
{ gd5440_available },
gd54xx_speed_changed,
gd54xx_force_redraw,
gd5428_config
gd5429_config
};
const device_t gd5446_pci_device =
{
"Cirrus Logic CL-GD 5446 (PCI)",
"Cirrus Logic GD5446 (PCI)",
DEVICE_PCI,
CIRRUS_ID_CLGD5446,
gd54xx_init,
@@ -4658,7 +4906,7 @@ const device_t gd5446_pci_device =
const device_t gd5446_stb_pci_device =
{
"STB Nitro 64V (PCI)",
"Cirrus Logic GD5446 (PCI) (STB Nitro 64V)",
DEVICE_PCI,
CIRRUS_ID_CLGD5446 | 0x100,
gd54xx_init,
@@ -4672,7 +4920,7 @@ const device_t gd5446_stb_pci_device =
const device_t gd5480_pci_device =
{
"Cirrus Logic CL-GD 5480 (PCI)",
"Cirrus Logic GD5480 (PCI)",
DEVICE_PCI,
CIRRUS_ID_CLGD5480,
gd54xx_init,
@@ -4681,5 +4929,5 @@ const device_t gd5480_pci_device =
{ gd5480_available },
gd54xx_speed_changed,
gd54xx_force_redraw,
gd5434_config
gd5480_config
};

1063
src/video/vid_et4000w32.c
View File

File diff suppressed because it is too large Load Diff

378
src/video/vid_paradise.c
View File

@@ -40,7 +40,7 @@ typedef struct paradise_t
rom_t bios_rom;
uint8_t pr0a, pr0b, pr1, pr5, bank_mask;
uint8_t bank_mask;
enum
{
@@ -54,7 +54,7 @@ typedef struct paradise_t
uint32_t read_bank[4], write_bank[4];
int interlace;
int check;
int check, check2;
struct {
uint8_t reg_block_ptr;
@@ -81,7 +81,7 @@ void paradise_out(uint16_t addr, uint8_t val, void *p)
{
paradise_t *paradise = (paradise_t *)p;
svga_t *svga = &paradise->svga;
uint8_t old, o;
uint8_t old;
if (paradise->vram_mask <= ((512 << 10) - 1))
paradise->bank_mask = 0x7f;
@@ -94,15 +94,14 @@ void paradise_out(uint16_t addr, uint8_t val, void *p)
switch (addr)
{
case 0x3c5:
if (svga->seqaddr > 7)
{
if (paradise->type < WD90C11 || svga->seqregs[6] != 0x48)
return;
svga->seqregs[svga->seqaddr & 0x1f] = val;
if (svga->seqaddr == 0x11) {
paradise_remap(paradise);
}
return;
if (svga->seqaddr > 7) {
if (paradise->type < WD90C11 || svga->seqregs[6] != 0x48)
return;
svga->seqregs[svga->seqaddr & 0x1f] = val;
if (svga->seqaddr == 0x11) {
paradise_remap(paradise);
}
return;
}
break;
@@ -115,53 +114,45 @@ void paradise_out(uint16_t addr, uint8_t val, void *p)
case 0x3cf:
if (svga->gdcaddr >= 9 && svga->gdcaddr <= 0x0e) {
if ((paradise->pr5 & 7) != 5)
if ((svga->gdcreg[0x0f] & 7) != 5)
return;
}
switch (svga->gdcaddr) {
case 6:
if (val & 8)
svga->banked_mask = 0x7fff;
else
svga->banked_mask = 0xffff;
if (svga->gdcreg[6] != val)
svga->gdcreg[6] = val;
if ((svga->gdcreg[6] & 0x0c) != (val & 0x0c)) {
switch (val & 0x0c) {
case 0x00: /*128k at A0000*/
mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x20000);
svga->banked_mask = 0xffff;
break;
case 0x04: /*64k at A0000*/
mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000);
svga->banked_mask = 0xffff;
break;
case 0x08: /*32k at B0000*/
mem_mapping_set_addr(&svga->mapping, 0xb0000, 0x08000);
svga->banked_mask = 0x7fff;
break;
case 0x0c: /*32k at B8000*/
mem_mapping_set_addr(&svga->mapping, 0xb8000, 0x08000);
svga->banked_mask = 0x7fff;
break;
}
}
svga->gdcreg[6] = val;
paradise_remap(paradise);
break;
return;
case 9:
paradise->pr0a = val & paradise->bank_mask;
paradise_remap(paradise);
break;
case 0x0a:
paradise->pr0b = val & paradise->bank_mask;
svga->gdcreg[svga->gdcaddr] = val & paradise->bank_mask;
paradise_remap(paradise);
break;
return;
case 0x0b:
paradise->pr1 = val;
svga->gdcreg[0x0b] = val;
paradise_remap(paradise);
break;
case 0x0d:
o = svga->gdcreg[0x0d];
svga->gdcreg[0x0d] = val;
if ((o ^ val) & 0x18)
svga_recalctimings(svga);
break;
case 0x0e:
o = svga->gdcreg[0x0e];
svga->gdcreg[0x0e] = val;
if ((o ^ val) & 0x01)
svga_recalctimings(svga);
break;
case 0x0c:
svga->gdcreg[0x0c] = val;
break;
case 0x0f:
paradise->pr5 = val;
break;
default:
svga->gdcreg[svga->gdcaddr] = val;
break;
return;
}
break;
@@ -216,10 +207,8 @@ uint8_t paradise_in(uint16_t addr, void *p)
{
if (paradise->type < WD90C11 || svga->seqregs[6] != 0x48)
return 0xff;
if (paradise->type < WD90C30) {
if (svga->seqaddr > 0x12)
if (svga->seqaddr > 0x12)
return 0xff;
}
return svga->seqregs[svga->seqaddr & 0x1f];
}
break;
@@ -231,36 +220,21 @@ uint8_t paradise_in(uint16_t addr, void *p)
case 0x3cf:
if (svga->gdcaddr >= 9 && svga->gdcaddr <= 0x0e) {
if (paradise->pr5 & 0x10)
if (svga->gdcreg[0x0f] & 0x10)
return 0xff;
}
switch (svga->gdcaddr) {
case 9:
return paradise->pr0a;
case 0x0a:
return paradise->pr0b;
case 0x0b:
if (paradise->vram_mask == (512 << 10) - 1) {
paradise->pr1 |= 0xc0;
paradise->pr1 &= ~0x40;
} else if (paradise->vram_mask == (1024 << 10) - 1) {
paradise->pr1 |= 0xc0;
/*The following is a horrible tweak, but needed to get around black corruption in 1M mode*/
if (svga->bpp >= 8 && (svga->gdcreg[0x0e] & 0x01) && paradise->check)
paradise->pr1 &= ~0x40;
else if (!(svga->gdcreg[0x0e] & 0x01) && !(svga->crtc[0x14] & 0x40) && paradise->check)
paradise->check = 0;
if (paradise->type == WD90C30) {
if (paradise->vram_mask == ((512 << 10) - 1)) {
svga->gdcreg[0x0b] |= 0xc0;
svga->gdcreg[0x0b] &= ~0x40;
}
}
return paradise->pr1;
case 6:
case 0x0c:
case 0x0d:
case 0x0e:
return svga->gdcreg[svga->gdcaddr];
return svga->gdcreg[0x0b];
case 0x0f:
return (paradise->pr5 & 0x17) | 0x80;
default:
return svga->gdcreg[svga->gdcaddr];
return (svga->gdcreg[0x0f] & 0x17) | 0x80;
}
break;
@@ -278,61 +252,46 @@ uint8_t paradise_in(uint16_t addr, void *p)
void paradise_remap(paradise_t *paradise)
{
svga_t *svga = &paradise->svga;
svga_t *svga = &paradise->svga;
paradise->check = 0;
if (svga->seqregs[0x11] & 0x80) {
paradise->read_bank[0] = (paradise->pr0a) << 12;
paradise->read_bank[1] = paradise->read_bank[0] + ((svga->gdcreg[6] & 8) ? 0 : 0x8000);
paradise->read_bank[2] = paradise->read_bank[0];
paradise->read_bank[3] = paradise->read_bank[1];
paradise->write_bank[0] = (paradise->pr0b) << 12;
paradise->write_bank[1] = paradise->write_bank[0] + ((svga->gdcreg[6] & 8) ? 0 : 0x8000);
paradise->write_bank[2] = paradise->write_bank[0];
paradise->write_bank[3] = paradise->write_bank[1];
} else if (paradise->pr1 & 8) {
if (svga->gdcreg[6] & 0x0c) {
paradise->read_bank[0] = (paradise->pr0b) << 12;
paradise->read_bank[1] = ((paradise->pr0a) << 12) + ((svga->gdcreg[6] & 8) ? 0 : 0x8000);
paradise->read_bank[2] = paradise->read_bank[0];
paradise->read_bank[3] = paradise->read_bank[1];
paradise->write_bank[0] = (paradise->pr0b) << 12;
paradise->write_bank[1] = ((paradise->pr0a) << 12) + ((svga->gdcreg[6] & 8) ? 0 : 0x8000);
paradise->write_bank[2] = paradise->write_bank[0];
paradise->write_bank[3] = paradise->write_bank[1];
} else {
paradise->read_bank[0] = (paradise->pr0b) << 12;
paradise->read_bank[1] = paradise->read_bank[0] + ((svga->gdcreg[6] & 8) ? 0 : 0x8000);
paradise->read_bank[2] = (paradise->pr0a) << 12;
paradise->read_bank[3] = paradise->read_bank[2] + ((svga->gdcreg[6] & 8) ? 0 : 0x8000);
paradise->write_bank[0] = (paradise->pr0b) << 12;
paradise->write_bank[1] = paradise->write_bank[0] + ((svga->gdcreg[6] & 8) ? 0 : 0x8000);
paradise->write_bank[2] = (paradise->pr0a) << 12;
paradise->write_bank[3] = paradise->write_bank[2] + ((svga->gdcreg[6] & 8) ? 0 : 0x8000);
}
} else {
paradise->read_bank[0] = (paradise->pr0a) << 12;
paradise->write_bank[0] = (paradise->pr0a) << 12;
paradise->read_bank[1] = paradise->read_bank[0] + ((svga->gdcreg[6] & 8) ? 0 : 0x8000);
paradise->write_bank[1] = paradise->write_bank[0] + ((svga->gdcreg[6] & 8) ? 0 : 0x8000);
paradise->read_bank[2] = paradise->read_bank[0];
paradise->write_bank[2] = paradise->write_bank[0];
paradise->read_bank[3] = paradise->read_bank[0] + ((svga->gdcreg[6] & 8) ? 0 : 0x8000);
paradise->write_bank[3] = paradise->write_bank[0] + ((svga->gdcreg[6] & 8) ? 0 : 0x8000);
}
if (paradise->bank_mask == 0x7f) {
paradise->read_bank[1] &= 0x7ffff;
paradise->write_bank[1] &= 0x7ffff;
if (svga->seqregs[0x11] & 0x80) {
paradise->read_bank[0] = paradise->read_bank[2] = svga->gdcreg[9] << 12;
paradise->read_bank[1] = paradise->read_bank[3] = (svga->gdcreg[9] << 12) + ((svga->gdcreg[6] & 0x08) ? 0 : 0x8000);
paradise->write_bank[0] = paradise->write_bank[2] = svga->gdcreg[0x0a] << 12;
paradise->write_bank[1] = paradise->write_bank[3] = (svga->gdcreg[0x0a] << 12) + ((svga->gdcreg[6] & 0x08) ? 0 : 0x8000);
} else if (svga->gdcreg[0x0b] & 0x08) {
if (svga->gdcreg[6] & 0x0c) {
paradise->read_bank[0] = paradise->read_bank[2] = svga->gdcreg[0x0a] << 12;
paradise->write_bank[0] = paradise->write_bank[2] = svga->gdcreg[0x0a] << 12;
paradise->read_bank[1] = paradise->read_bank[3] = (svga->gdcreg[9] << 12) + ((svga->gdcreg[6] & 0x08) ? 0 : 0x8000);
paradise->write_bank[1] = paradise->write_bank[3] = (svga->gdcreg[9] << 12) + ((svga->gdcreg[6] & 0x08) ? 0 : 0x8000);
} else {
paradise->read_bank[0] = paradise->write_bank[0] = svga->gdcreg[0x0a] << 12;
paradise->read_bank[1] = paradise->write_bank[1] = (svga->gdcreg[0xa] << 12) + ((svga->gdcreg[6] & 0x08) ? 0 : 0x8000);
paradise->read_bank[2] = paradise->write_bank[2] = svga->gdcreg[9] << 12;
paradise->read_bank[3] = paradise->write_bank[3] = (svga->gdcreg[9] << 12) + ((svga->gdcreg[6] & 0x08) ? 0 : 0x8000);
}
} else {
paradise->read_bank[0] = paradise->read_bank[2] = svga->gdcreg[9] << 12;
paradise->read_bank[1] = paradise->read_bank[3] = (svga->gdcreg[9] << 12) + ((svga->gdcreg[6] & 0x08) ? 0 : 0x8000);
paradise->write_bank[0] = paradise->write_bank[2] = svga->gdcreg[9] << 12;
paradise->write_bank[1] = paradise->write_bank[3] = (svga->gdcreg[9] << 12) + ((svga->gdcreg[6] & 0x08) ? 0 : 0x8000);
}
if ((((svga->gdcreg[0x0b] & 0xc0) == 0xc0) && !svga->chain4 && (svga->crtc[0x14] & 0x40) && ((svga->gdcreg[6] >> 2) & 3) == 1))
paradise->check = 1;
if (paradise->bank_mask == 0x7f) {
paradise->read_bank[1] &= 0x7ffff;
paradise->write_bank[1] &= 0x7ffff;
}
}
void paradise_recalctimings(svga_t *svga)
{
paradise_t *paradise = (paradise_t *) svga->p;
if (svga->gdcreg[0x0d] & 0x08) svga->ma_latch |= 0x10000;
if (svga->gdcreg[0x0d] & 0x10) svga->ma_latch |= 0x20000;
svga->lowres = !(svga->gdcreg[0x0e] & 0x01);
if (paradise->type == WD90C30) {
@@ -355,8 +314,6 @@ void paradise_recalctimings(svga_t *svga)
if (paradise->type < WD90C30) {
if (svga->bpp >= 8 && !svga->lowres) {
if ((svga->crtc[0x17] == 0xc2) && (svga->crtc[0x14] & 0x40))
paradise->check = 1;
svga->render = svga_render_8bpp_highres;
}
} else {
@@ -368,8 +325,6 @@ void paradise_recalctimings(svga_t *svga)
svga->render = svga_render_15bpp_highres;
svga->hdisp >>= 1;
} else {
if ((svga->crtc[0x17] == 0xc2) && (svga->crtc[0x14] & 0x40))
paradise->check = 1;
svga->render = svga_render_8bpp_highres;
}
}
@@ -380,20 +335,94 @@ static void paradise_write(uint32_t addr, uint8_t val, void *p)
{
paradise_t *paradise = (paradise_t *)p;
svga_t *svga = &paradise->svga;
uint32_t prev_addr, prev_addr2;
addr &= svga->banked_mask;
addr = (addr & 0x7fff) + paradise->write_bank[(addr >> 15) & 3];
addr = (addr & 0x7fff) + paradise->write_bank[(addr >> 15) & 3];
/*Could be done in a better way but it works.*/
if (!svga->lowres) {
if (paradise->check) {
prev_addr = addr & 3;
prev_addr2 = addr & 0xfffc;
if ((addr & 3) == 3) {
if ((addr & 0x30000) == 0x20000)
addr = (addr >> 16) | (prev_addr << 16) | prev_addr2;
else if ((addr & 0x30000) == 0x10000)
addr = (addr >> 16) | (prev_addr << 16) | prev_addr2;
else if ((addr & 0x30000) == 0x00000)
addr = (addr >> 16) | (prev_addr << 16) | prev_addr2;
} else if ((addr & 3) == 2) {
if ((addr & 0x30000) == 0x30000)
addr = (addr >> 16) | (prev_addr << 16) | prev_addr2;
else if ((addr & 0x30000) == 0x10000)
addr = (addr >> 16) | (prev_addr << 16) | prev_addr2;
else if ((addr & 0x30000) == 0x00000)
addr = (addr >> 16) | (prev_addr << 16) | prev_addr2;
} else if ((addr & 3) == 1) {
if ((addr & 0x30000) == 0x30000)
addr = (addr >> 16) | (prev_addr << 16) | prev_addr2;
else if ((addr & 0x30000) == 0x20000)
addr = (addr >> 16) | (prev_addr << 16) | prev_addr2;
else if ((addr & 0x30000) == 0x00000)
addr = (addr >> 16) | (prev_addr << 16) | prev_addr2;
} else if ((addr & 3) == 0) {
if ((addr & 0x30000) == 0x30000)
addr = (addr >> 16) | (prev_addr << 16) | prev_addr2;
else if ((addr & 0x30000) == 0x20000)
addr = (addr >> 16) | (prev_addr << 16) | prev_addr2;
else if ((addr & 0x30000) == 0x10000)
addr = (addr >> 16) | (prev_addr << 16) | prev_addr2;
}
}
}
svga_write_linear(addr, val, svga);
}
static void paradise_writew(uint32_t addr, uint16_t val, void *p)
{
paradise_t *paradise = (paradise_t *)p;
svga_t *svga = &paradise->svga;
uint32_t prev_addr, prev_addr2;
addr &= svga->banked_mask;
addr = (addr & 0x7fff) + paradise->write_bank[(addr >> 15) & 3];
/*Could be done in a better way but it works.*/
if (!svga->lowres) {
if (paradise->check) {
prev_addr = addr & 3;
prev_addr2 = addr & 0xfffc;
if ((addr & 3) == 3) {
if ((addr & 0x30000) == 0x20000)
addr = (addr >> 16) | (prev_addr << 16) | prev_addr2;
else if ((addr & 0x30000) == 0x10000)
addr = (addr >> 16) | (prev_addr << 16) | prev_addr2;
else if ((addr & 0x30000) == 0x00000)
addr = (addr >> 16) | (prev_addr << 16) | prev_addr2;
} else if ((addr & 3) == 2) {
if ((addr & 0x30000) == 0x30000)
addr = (addr >> 16) | (prev_addr << 16) | prev_addr2;
else if ((addr & 0x30000) == 0x10000)
addr = (addr >> 16) | (prev_addr << 16) | prev_addr2;
else if ((addr & 0x30000) == 0x00000)
addr = (addr >> 16) | (prev_addr << 16) | prev_addr2;
} else if ((addr & 3) == 1) {
if ((addr & 0x30000) == 0x30000)
addr = (addr >> 16) | (prev_addr << 16) | prev_addr2;
else if ((addr & 0x30000) == 0x20000)
addr = (addr >> 16) | (prev_addr << 16) | prev_addr2;
else if ((addr & 0x30000) == 0x00000)
addr = (addr >> 16) | (prev_addr << 16) | prev_addr2;
} else if ((addr & 3) == 0) {
if ((addr & 0x30000) == 0x30000)
addr = (addr >> 16) | (prev_addr << 16) | prev_addr2;
else if ((addr & 0x30000) == 0x20000)
addr = (addr >> 16) | (prev_addr << 16) | prev_addr2;
else if ((addr & 0x30000) == 0x10000)
addr = (addr >> 16) | (prev_addr << 16) | prev_addr2;
}
}
}
svga_writew_linear(addr, val, svga);
}
@@ -401,9 +430,46 @@ static uint8_t paradise_read(uint32_t addr, void *p)
{
paradise_t *paradise = (paradise_t *)p;
svga_t *svga = &paradise->svga;
addr &= svga->banked_mask;
uint32_t prev_addr, prev_addr2;
addr = (addr & 0x7fff) + paradise->read_bank[(addr >> 15) & 3];
/*Could be done in a better way but it works.*/
if (!svga->lowres) {
if (paradise->check) {
prev_addr = addr & 3;
prev_addr2 = addr & 0xfffc;
if ((addr & 3) == 3) {
if ((addr & 0x30000) == 0x20000)
addr = (addr >> 16) | (prev_addr << 16) | prev_addr2;
else if ((addr & 0x30000) == 0x10000)
addr = (addr >> 16) | (prev_addr << 16) | prev_addr2;
else if ((addr & 0x30000) == 0x00000)
addr = (addr >> 16) | (prev_addr << 16) | prev_addr2;
} else if ((addr & 3) == 2) {
if ((addr & 0x30000) == 0x30000)
addr = (addr >> 16) | (prev_addr << 16) | prev_addr2;
else if ((addr & 0x30000) == 0x10000)
addr = (addr >> 16) | (prev_addr << 16) | prev_addr2;
else if ((addr & 0x30000) == 0x00000)
addr = (addr >> 16) | (prev_addr << 16) | prev_addr2;
} else if ((addr & 3) == 1) {
if ((addr & 0x30000) == 0x30000)
addr = (addr >> 16) | (prev_addr << 16) | prev_addr2;
else if ((addr & 0x30000) == 0x20000)
addr = (addr >> 16) | (prev_addr << 16) | prev_addr2;
else if ((addr & 0x30000) == 0x00000)
addr = (addr >> 16) | (prev_addr << 16) | prev_addr2;
} else if ((addr & 3) == 0) {
if ((addr & 0x30000) == 0x30000)
addr = (addr >> 16) | (prev_addr << 16) | prev_addr2;
else if ((addr & 0x30000) == 0x20000)
addr = (addr >> 16) | (prev_addr << 16) | prev_addr2;
else if ((addr & 0x30000) == 0x10000)
addr = (addr >> 16) | (prev_addr << 16) | prev_addr2;
}
}
}
return svga_read_linear(addr, svga);
}
@@ -411,11 +477,48 @@ static uint16_t paradise_readw(uint32_t addr, void *p)
{
paradise_t *paradise = (paradise_t *)p;
svga_t *svga = &paradise->svga;
addr &= svga->banked_mask;
uint32_t prev_addr, prev_addr2;
addr = (addr & 0x7fff) + paradise->read_bank[(addr >> 15) & 3];
/*Could be done in a better way but it works.*/
if (!svga->lowres) {
if (paradise->check) {
prev_addr = addr & 3;
prev_addr2 = addr & 0xfffc;
if ((addr & 3) == 3) {
if ((addr & 0x30000) == 0x20000)
addr = (addr >> 16) | (prev_addr << 16) | prev_addr2;
else if ((addr & 0x30000) == 0x10000)
addr = (addr >> 16) | (prev_addr << 16) | prev_addr2;
else if ((addr & 0x30000) == 0x00000)
addr = (addr >> 16) | (prev_addr << 16) | prev_addr2;
} else if ((addr & 3) == 2) {
if ((addr & 0x30000) == 0x30000)
addr = (addr >> 16) | (prev_addr << 16) | prev_addr2;
else if ((addr & 0x30000) == 0x10000)
addr = (addr >> 16) | (prev_addr << 16) | prev_addr2;
else if ((addr & 0x30000) == 0x00000)
addr = (addr >> 16) | (prev_addr << 16) | prev_addr2;
} else if ((addr & 3) == 1) {
if ((addr & 0x30000) == 0x30000)
addr = (addr >> 16) | (prev_addr << 16) | prev_addr2;
else if ((addr & 0x30000) == 0x20000)
addr = (addr >> 16) | (prev_addr << 16) | prev_addr2;
else if ((addr & 0x30000) == 0x00000)
addr = (addr >> 16) | (prev_addr << 16) | prev_addr2;
} else if ((addr & 3) == 0) {
if ((addr & 0x30000) == 0x30000)
addr = (addr >> 16) | (prev_addr << 16) | prev_addr2;
else if ((addr & 0x30000) == 0x20000)
addr = (addr >> 16) | (prev_addr << 16) | prev_addr2;
else if ((addr & 0x30000) == 0x10000)
addr = (addr >> 16) | (prev_addr << 16) | prev_addr2;
}
}
}
return svga_readw_linear(addr, svga);
return svga_readw_linear(addr, svga);
}
void *paradise_init(const device_t *info, uint32_t memsize)
@@ -653,9 +756,6 @@ static const device_config_t paradise_pvga1a_config[] =
{
"512 kB", 512
},
{
"1 MB", 1024
},
{
""
}

193
src/video/vid_s3.c
View File

@@ -62,9 +62,11 @@
#define ROM_DIAMOND_STEALTH_SE "roms/video/s3/DiamondStealthSE.VBI"
#define ROM_ELSAWIN2KPROX_964 "roms/video/s3/elsaw20004m.BIN"
#define ROM_ELSAWIN2KPROX "roms/video/s3/elsaw20008m.BIN"
#define ROM_NUMBER9_9FX_531 "roms/video/s3/numbernine.BIN"
#define ROM_PHOENIX_VISION868 "roms/video/s3/1-DSV3868.BIN"
#define ROM_MIROVIDEO40SV_ERGO_968_PCI "roms/video/s3/S3_968PCI_TVP3026_miroVideo40SV_PCI_1.04.BIN"
#define ROM_SPEA_MERCURY_P64V "roms/video/s3/S3_968PCI_TVP3026_SPEAMecuryP64V_ver1.01.BIN"
#define ROM_NUMBER9_9FX_771 "roms/video/s3/no9motionfx771.BIN"
#define ROM_PHOENIX_VISION968 "roms/video/s3/1-DSV3968P.BIN"
enum
@@ -100,7 +102,9 @@ enum
S3_MIROCRYSTAL20SV_964,
S3_MIROCRYSTAL20SD_864,
S3_PHOENIX_VISION968,
S3_MIROCRYSTAL8S_805
S3_MIROCRYSTAL8S_805,
S3_NUMBER9_9FX_531,
S3_NUMBER9_9FX_771
};
@@ -1140,18 +1144,30 @@ s3_accel_out_fifo(s3_t *s3, uint16_t port, uint8_t val)
break;
s3->accel.pix_trans[0] = val;
if (s3->accel.cmd & 0x100) {
if (!(s3->accel.cmd & 0x600)) {
if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) {
if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40))
s3_accel_start(8, 1, s3->accel.pix_trans[0], 0, s3);
else
s3_accel_start(1, 1, 0xffffffff, s3->accel.pix_trans[0], s3);
} else {
if (s3->color_16bit)
s3_accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[0], s3);
else
s3_accel_start(1, 1, 0xffffffff, s3->accel.pix_trans[0], s3);
}
switch (s3->accel.cmd & 0x600) {
case 0x000:
if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) {
if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40))
s3_accel_start(8, 1, s3->accel.pix_trans[0], 0, s3);
else
s3_accel_start(1, 1, 0xffffffff, s3->accel.pix_trans[0], s3);
} else {
if (s3->color_16bit)
s3_accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[0], s3);
else
s3_accel_start(1, 1, 0xffffffff, s3->accel.pix_trans[0], s3);
}
break;
case 0x200:
if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) {
if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40))
s3_accel_start(16, 1, s3->accel.pix_trans[0] | (s3->accel.pix_trans[0] << 8), 0, s3);
else
s3_accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[0] << 8), s3);
} else {
s3_accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[0] << 8), s3);
}
break;
}
}
break;
@@ -2442,7 +2458,7 @@ s3_out(uint16_t addr, uint8_t val, void *p)
rs3 = 0;
bt48x_ramdac_out(addr, rs2, rs3, val, svga->ramdac, svga);
} else if ((s3->chip == S3_VISION964 && s3->card_type == S3_ELSAWIN2KPROX_964) || (s3->chip == S3_VISION968 && (s3->card_type == S3_ELSAWIN2KPROX ||
s3->card_type == S3_PHOENIX_VISION968)))
s3->card_type == S3_PHOENIX_VISION968 || s3->card_type == S3_NUMBER9_9FX_771)))
ibm_rgb528_ramdac_out(addr, rs2, val, svga->ramdac, svga);
else if ((s3->chip == S3_VISION968 && (s3->card_type == S3_SPEA_MERCURY_P64V || s3->card_type == S3_MIROVIDEO40SV_ERGO_968))) {
rs3 = !!(svga->crtc[0x55] & 0x02);
@@ -2451,7 +2467,9 @@ s3_out(uint16_t addr, uint8_t val, void *p)
att49x_ramdac_out(addr, rs2, val, svga->ramdac, svga);
else if (s3->chip <= S3_86C924) {
sc1148x_ramdac_out(addr, rs2, val, svga->ramdac, svga);
} else
} else if (s3->card_type == S3_NUMBER9_9FX_531)
att498_ramdac_out(addr, rs2, val, svga->ramdac, svga);
else
sdac_ramdac_out(addr, rs2, val, svga->ramdac, svga);
return;
@@ -2728,7 +2746,7 @@ s3_in(uint16_t addr, void *p)
rs3 = !!(svga->crtc[0x55] & 0x02);
return bt48x_ramdac_in(addr, rs2, rs3, svga->ramdac, svga);
} else if ((s3->chip == S3_VISION964 && s3->card_type == S3_ELSAWIN2KPROX_964) || (s3->chip == S3_VISION968 && (s3->card_type == S3_ELSAWIN2KPROX ||
s3->card_type == S3_PHOENIX_VISION968)))
s3->card_type == S3_PHOENIX_VISION968 || s3->card_type == S3_NUMBER9_9FX_771)))
return ibm_rgb528_ramdac_in(addr, rs2, svga->ramdac, svga);
else if ((s3->chip == S3_VISION968 && (s3->card_type == S3_SPEA_MERCURY_P64V || s3->card_type == S3_MIROVIDEO40SV_ERGO_968))) {
rs3 = !!(svga->crtc[0x55] & 0x02);
@@ -2737,6 +2755,8 @@ s3_in(uint16_t addr, void *p)
return att49x_ramdac_in(addr, rs2, svga->ramdac, svga);
else if (s3->chip <= S3_86C924)
return sc1148x_ramdac_in(addr, rs2, svga->ramdac, svga);
else if (s3->card_type == S3_NUMBER9_9FX_531)
return att498_ramdac_in(addr, rs2, svga->ramdac, svga);
else
return sdac_ramdac_in(addr, rs2, svga->ramdac, svga);
break;
@@ -2839,7 +2859,7 @@ static void s3_recalctimings(svga_t *svga)
else
ibm_rgb528_recalctimings(svga->ramdac, svga);
} else
svga->interlace = svga->crtc[0x42] & 0x20;
svga->interlace = !!(svga->crtc[0x42] & 0x20);
if ((((svga->miscout >> 2) & 3) == 3) && s3->chip < S3_TRIO32)
clk_sel = svga->crtc[0x42] & 0x0f;
@@ -2856,10 +2876,25 @@ static void s3_recalctimings(svga_t *svga)
if (s3->card_type == S3_MIROCRYSTAL10SD_805 || s3->card_type == S3_MIROCRYSTAL20SD_864 ||
s3->card_type == S3_MIROCRYSTAL20SV_964 || s3->card_type == S3_SPEA_MIRAGE_86C801 ||
s3->card_type == S3_SPEA_MIRAGE_86C805 || s3->card_type == S3_MIROCRYSTAL8S_805) {
s3->card_type == S3_SPEA_MIRAGE_86C805 || s3->card_type == S3_MIROCRYSTAL8S_805 ||
s3->card_type == S3_NUMBER9_9FX_531) {
if (!(svga->crtc[0x5e] & 0x04))
svga->vblankstart = svga->dispend;
if (svga->bpp != 32) {
if (svga->crtc[0x31] & 2) /*This is needed if the pixel width gets set with delays*/
s3->width = 2048;
else {
if (s3->card_type == S3_MIROCRYSTAL10SD_805) {
if (svga->hdisp == 1280 && s3->width == 1024) {
s3->width = 1280;
}
}
}
} else {
if (s3->card_type == S3_NUMBER9_9FX_531) {
if (svga->hdisp == 1600 && s3->width == 1600)
s3->width = 800;
}
}
} else if (s3->chip == S3_86C928) {
if (svga->bpp == 15) {
@@ -2889,15 +2924,16 @@ static void s3_recalctimings(svga_t *svga)
if (s3->chip != S3_VISION868) {
if (s3->chip == S3_86C928) {
if (s3->width == 2048 || s3->width == 1280 || s3->width == 1600)
svga->hdisp *= 2;
svga->hdisp <<= 1;
} else if ((s3->chip != S3_86C801) && (s3->chip != S3_86C805) && (s3->chip != S3_TRIO32) &&
(s3->chip != S3_TRIO64) && (s3->chip != S3_VISION964) && (s3->chip != S3_VISION968)) {
if (s3->width == 1280 || s3->width == 1600)
svga->hdisp *= 2;
svga->hdisp <<= 1;
} else if (s3->card_type == S3_SPEA_MERCURY_P64V) {
if (s3->width == 1280 || s3->width == 1600)
svga->hdisp *= 2;
}
svga->hdisp <<= 1;
} else if (s3->card_type == S3_NUMBER9_9FX_771)
svga->hdisp <<= 1;
if (s3->card_type == S3_MIROVIDEO40SV_ERGO_968 || s3->card_type == S3_MIROCRYSTAL20SD_864 ||
s3->card_type == S3_PHOENIX_VISION968 || s3->card_type == S3_SPEA_MERCURY_P64V) {
@@ -2948,19 +2984,21 @@ static void s3_recalctimings(svga_t *svga)
if ((s3->chip != S3_VISION964) && (s3->card_type != S3_SPEA_MIRAGE_86C801) &&
(s3->card_type != S3_SPEA_MIRAGE_86C805)) {
if (s3->chip == S3_86C928)
svga->hdisp *= 2;
svga->hdisp <<= 1;
else if (s3->chip != S3_VISION968)
svga->hdisp /= 2;
svga->hdisp >>= 1;
}
if ((s3->chip != S3_VISION868) && (s3->chip != S3_TRIO32) &&
(s3->chip != S3_TRIO64) && (s3->chip != S3_VISION964)) {
if (s3->width == 1280 || s3->width == 1600)
svga->hdisp *= 2;
svga->hdisp <<= 1;
else if (s3->card_type == S3_NUMBER9_9FX_771)
svga->hdisp <<= 1;
}
if (s3->card_type == S3_MIROVIDEO40SV_ERGO_968 || s3->card_type == S3_PHOENIX_VISION968 ||
s3->card_type == S3_SPEA_MERCURY_P64V) {
if (svga->hdisp == (1408*2))
svga->hdisp /= 2;
svga->hdisp >>= 1;
else
svga->hdisp = s3->width;
}
@@ -2973,21 +3011,22 @@ static void s3_recalctimings(svga_t *svga)
if ((s3->chip != S3_VISION964) && (s3->card_type != S3_SPEA_MIRAGE_86C801) &&
(s3->card_type != S3_SPEA_MIRAGE_86C805)) {
if (s3->chip == S3_86C928)
svga->hdisp *= 2;
svga->hdisp <<= 1;
else if (s3->chip != S3_VISION968)
svga->hdisp /= 2;
} else if ((s3->card_type == S3_SPEA_MIRAGE_86C801) || (s3->card_type == S3_SPEA_MIRAGE_86C805)) {
svga->hdisp /= 2;
}
svga->hdisp >>= 1;
} else if ((s3->card_type == S3_SPEA_MIRAGE_86C801) || (s3->card_type == S3_SPEA_MIRAGE_86C805))
svga->hdisp >>= 1;
if ((s3->chip != S3_VISION868) && (s3->chip != S3_TRIO32) &&
(s3->chip != S3_TRIO64) && (s3->chip != S3_VISION964)) {
if (s3->width == 1280 || s3->width == 1600)
svga->hdisp *= 2;
svga->hdisp <<= 1;
else if (s3->card_type == S3_NUMBER9_9FX_771)
svga->hdisp <<= 1;
}
if (s3->card_type == S3_MIROVIDEO40SV_ERGO_968 || s3->card_type == S3_PHOENIX_VISION968 ||
s3->card_type == S3_SPEA_MERCURY_P64V) {
if (svga->hdisp == (1408*2))
svga->hdisp /= 2;
svga->hdisp >>= 1;
else
svga->hdisp = s3->width;
}
@@ -3013,12 +3052,13 @@ static void s3_recalctimings(svga_t *svga)
if ((s3->chip < S3_TRIO32) && (s3->chip != S3_VISION964) &&
(s3->chip != S3_VISION968) && (s3->chip != S3_86C928)) {
if (s3->chip == S3_VISION868)
svga->hdisp /= 2;
svga->hdisp >>= 1;
else
svga->hdisp /= 4;
svga->hdisp >>= 2;
}
if (s3->width == 1280 || s3->width == 1600 || (s3->card_type == S3_SPEA_MERCURY_P64V))
svga->hdisp *= 2;
if (s3->width == 1280 || s3->width == 1600 || (s3->card_type == S3_SPEA_MERCURY_P64V ||
s3->card_type == S3_NUMBER9_9FX_771))
svga->hdisp <<= 1;
if (s3->card_type == S3_MIROVIDEO40SV_ERGO_968 || s3->card_type == S3_MIROCRYSTAL20SV_964 ||
s3->card_type == S3_MIROCRYSTAL20SD_864 || s3->card_type == S3_PHOENIX_VISION968 ||
s3->card_type == S3_SPEA_MERCURY_P64V) {
@@ -3110,11 +3150,11 @@ static void s3_trio64v_recalctimings(svga_t *svga)
break;
case 15:
svga->render = svga_render_15bpp_highres;
svga->hdisp /= 2;
svga->hdisp >>= 1;
break;
case 16:
svga->render = svga_render_16bpp_highres;
svga->hdisp /= 2;
svga->hdisp >>= 1;
break;
case 24:
svga->render = svga_render_24bpp_highres;
@@ -6530,6 +6570,7 @@ static void s3_reset(void *priv)
case S3_ELSAWIN2KPROX:
case S3_SPEA_MERCURY_P64V:
case S3_MIROVIDEO40SV_ERGO_968:
case S3_NUMBER9_9FX_771:
case S3_PHOENIX_VISION968:
if (s3->pci) {
svga->crtc[0x53] = 0x18;
@@ -6544,6 +6585,7 @@ static void s3_reset(void *priv)
}
break;
case S3_NUMBER9_9FX_531:
case S3_PHOENIX_VISION868:
if (s3->pci) {
svga->crtc[0x53] = 0x18;
@@ -6679,6 +6721,11 @@ static void *s3_init(const device_t *info)
else
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_vision864_vlb);
break;
case S3_NUMBER9_9FX_531:
bios_fn = ROM_NUMBER9_9FX_531;
chip = S3_VISION868;
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_vision868_pci);
break;
case S3_PHOENIX_VISION868:
bios_fn = ROM_PHOENIX_VISION868;
chip = S3_VISION868;
@@ -6710,6 +6757,11 @@ static void *s3_init(const device_t *info)
chip = S3_VISION968;
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_vision968_pci);
break;
case S3_NUMBER9_9FX_771:
bios_fn = ROM_NUMBER9_9FX_771;
chip = S3_VISION968;
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_vision968_pci);
break;
case S3_PHOENIX_VISION968:
bios_fn = ROM_PHOENIX_VISION968;
chip = S3_VISION968;
@@ -6887,7 +6939,7 @@ static void *s3_init(const device_t *info)
if (chip == S3_VISION964 && info->local != S3_ELSAWIN2KPROX_964)
svga->dac_hwcursor_draw = bt48x_hwcursor_draw;
else if ((chip == S3_VISION964 && info->local == S3_ELSAWIN2KPROX_964) || (chip == S3_VISION968 && (info->local == S3_ELSAWIN2KPROX ||
info->local == S3_PHOENIX_VISION968)))
info->local == S3_PHOENIX_VISION968 || info->local == S3_NUMBER9_9FX_771)))
svga->dac_hwcursor_draw = ibm_rgb528_hwcursor_draw;
else if (chip == S3_VISION968 && (info->local == S3_SPEA_MERCURY_P64V || info->local == S3_MIROVIDEO40SV_ERGO_968))
svga->dac_hwcursor_draw = tvp3026_hwcursor_draw;
@@ -7048,7 +7100,7 @@ static void *s3_init(const device_t *info)
case S3_PARADISE_BAHAMAS64:
case S3_PHOENIX_VISION864:
case S3_MIROCRYSTAL20SD_864:
case S3_MIROCRYSTAL20SD_864: /*BIOS 3.xx has a SDAC ramdac.*/
svga->decode_mask = (8 << 20) - 1;
if (info->local == S3_PARADISE_BAHAMAS64 || info->local == S3_MIROCRYSTAL20SD_864)
stepping = 0xc0; /*Vision864*/
@@ -7085,6 +7137,7 @@ static void *s3_init(const device_t *info)
case S3_ELSAWIN2KPROX:
case S3_SPEA_MERCURY_P64V:
case S3_MIROVIDEO40SV_ERGO_968:
case S3_NUMBER9_9FX_771:
case S3_PHOENIX_VISION968:
svga->decode_mask = (8 << 20) - 1;
s3->id = 0xe1; /*Vision968*/
@@ -7102,7 +7155,8 @@ static void *s3_init(const device_t *info)
svga->crtc[0x5a] = 0x0a;
}
if (info->local == S3_ELSAWIN2KPROX || info->local == S3_PHOENIX_VISION968)
if (info->local == S3_ELSAWIN2KPROX || info->local == S3_PHOENIX_VISION968 ||
info->local == S3_NUMBER9_9FX_771)
svga->ramdac = device_add(&ibm_rgb528_ramdac_device);
else
svga->ramdac = device_add(&tvp3026_ramdac_device);
@@ -7111,6 +7165,7 @@ static void *s3_init(const device_t *info)
svga->getclock = icd2061_getclock;
break;
case S3_NUMBER9_9FX_531:
case S3_PHOENIX_VISION868:
svga->decode_mask = (8 << 20) - 1;
s3->id = 0xe1; /*Vision868*/
@@ -7128,10 +7183,16 @@ static void *s3_init(const device_t *info)
svga->crtc[0x59] = 0x00;
svga->crtc[0x5a] = 0x0a;
}
svga->ramdac = device_add(&sdac_ramdac_device);
svga->clock_gen = svga->ramdac;
svga->getclock = sdac_getclock;
if (info->local == S3_NUMBER9_9FX_531) {
svga->ramdac = device_add(&att498_ramdac_device);
svga->clock_gen = device_add(&icd2061_device);
svga->getclock = icd2061_getclock;
} else {
svga->ramdac = device_add(&sdac_ramdac_device);
svga->clock_gen = svga->ramdac;
svga->getclock = sdac_getclock;
}
break;
case S3_PHOENIX_TRIO32:
@@ -7261,6 +7322,11 @@ static int s3_phoenix_vision864_available(void)
return rom_present(ROM_PHOENIX_VISION864);
}
static int s3_9fx_531_available(void)
{
return rom_present(ROM_NUMBER9_9FX_531);
}
static int s3_phoenix_vision868_available(void)
{
return rom_present(ROM_PHOENIX_VISION868);
@@ -7286,6 +7352,11 @@ static int s3_mirovideo_40sv_ergo_968_pci_available(void)
return rom_present(ROM_MIROVIDEO40SV_ERGO_968_PCI);
}
static int s3_9fx_771_available(void)
{
return rom_present(ROM_NUMBER9_9FX_771);
}
static int s3_phoenix_vision968_available(void)
{
return rom_present(ROM_PHOENIX_VISION968);
@@ -7448,7 +7519,7 @@ static const device_config_t s3_phoenix_trio32_config[] =
static const device_config_t s3_standard_config[] =
{
{
"memory", "Video memory size", CONFIG_SELECTION, "", 4, "", { 0 },
"memory", "Memory size", CONFIG_SELECTION, "", 4, "", { 0 },
{
{
"1 MB", 1
@@ -7750,6 +7821,20 @@ const device_t s3_diamond_stealth64_964_pci_device =
s3_standard_config
};
const device_t s3_9fx_771_pci_device =
{
"S3 Vision968 PCI (Number 9 9FX 771)",
DEVICE_PCI,
S3_NUMBER9_9FX_771,
s3_init,
s3_close,
s3_reset,
{ s3_9fx_771_available },
s3_speed_changed,
s3_force_redraw,
s3_standard_config
};
const device_t s3_phoenix_vision968_pci_device =
{
"S3 Vision968 PCI (Phoenix)",
@@ -7989,6 +8074,20 @@ const device_t s3_phoenix_vision864_pci_device =
s3_standard_config
};
const device_t s3_9fx_531_pci_device =
{
"S3 Vision868 PCI (Number 9 9FX 531)",
DEVICE_PCI,
S3_NUMBER9_9FX_531,
s3_init,
s3_close,
s3_reset,
{ s3_9fx_531_available },
s3_speed_changed,
s3_force_redraw,
s3_9fx_config
};
const device_t s3_phoenix_vision868_vlb_device =
{
"S3 Vision868 VLB (Phoenix)",

24
src/video/vid_table.c
View File

@@ -72,9 +72,12 @@ video_cards[] = {
{ "cl_gd5402_isa", &gd5402_isa_device },
{ "cl_gd5420_isa", &gd5420_isa_device },
{ "cl_gd5422_isa", &gd5422_isa_device },
{ "cl_gd5426_isa", &gd5426_isa_device },
{ "cl_gd5426_diamond_a1_isa", &gd5426_diamond_speedstar_pro_a1_isa_device },
{ "cl_gd5428_isa", &gd5428_isa_device },
{ "cl_gd5429_isa", &gd5429_isa_device },
{ "cl_gd5434_isa", &gd5434_isa_device },
{ "cl_gd5434_diamond_a3_isa", &gd5434_diamond_speedstar_64_a3_isa_device },
{ "compaq_cga", &compaq_cga_device },
{ "compaq_cga_2", &compaq_cga_2_device },
{ "compaq_ega", &cpqega_device },
@@ -123,14 +126,15 @@ video_cards[] = {
{ "radius_mc", &radius_svga_multiview_mca_device },
{ "mach64gx_pci", &mach64gx_pci_device },
{ "mach64vt2", &mach64vt2_device },
{ "et4000w32p_revc_pci", &et4000w32p_revc_pci_device },
{ "et4000w32p_pci", &et4000w32p_cardex_pci_device },
{ "et4000w32p_nc_pci", &et4000w32p_noncardex_pci_device },
{ "et4000w32p_revc_pci", &et4000w32p_revc_pci_device },
{ "cl_gd5430_pci", &gd5430_pci_device, },
{ "cl_gd5434_pci", &gd5434_pci_device },
{ "cl_gd5436_pci", &gd5436_pci_device },
{ "cl_gd5440_pci", &gd5440_pci_device },
{ "cl_gd5446_pci", &gd5446_pci_device },
{ "cl_gd5446_stb_pci", &gd5446_stb_pci_device },
{ "cl_gd5480_pci", &gd5480_pci_device },
{ "ctl3d_banshee_pci", &creative_voodoo_banshee_device },
{ "stealth32_pci", &et4000w32p_pci_device },
@@ -146,8 +150,10 @@ video_cards[] = {
{ "px_trio64_pci", &s3_phoenix_trio64_pci_device },
{ "elsawin2kprox_pci", &s3_elsa_winner2000_pro_x_pci_device },
{ "mirovideo40sv_pci", &s3_mirovideo_40sv_ergo_968_pci_device },
{ "n9_9fx_771_pci", &s3_9fx_771_pci_device },
{ "px_vision968_pci", &s3_phoenix_vision968_pci_device },
{ "spea_mercury64p_pci", &s3_spea_mercury_p64v_pci_device },
{ "n9_9fx_531_pci", &s3_9fx_531_pci_device },
{ "px_vision868_pci", &s3_phoenix_vision868_pci_device },
{ "px_trio64vplus_pci", &s3_phoenix_trio64vplus_pci_device },
{ "trio64v2dx_pci", &s3_trio64v2_dx_pci_device },
@@ -164,7 +170,6 @@ video_cards[] = {
{ "mystique", &mystique_device },
{ "mystique_220", &mystique_220_device },
#endif
{ "cl_gd5446_stb_pci", &gd5446_stb_pci_device },
{ "tgui9440_pci", &tgui9440_pci_device },
{ "tgui9660_pci", &tgui9660_pci_device },
{ "tgui9680_pci", &tgui9680_pci_device },
@@ -173,16 +178,17 @@ video_cards[] = {
{ "voodoo3_3k_pci", &voodoo_3_3000_device },
{ "mach64gx_vlb", &mach64gx_vlb_device },
{ "et4000w32i_vlb", &et4000w32i_vlb_device },
{ "et4000w32p_vlb", &et4000w32p_cardex_vlb_device },
{ "et4000w32p_nc_vlb", &et4000w32p_noncardex_vlb_device },
{ "et4000w32p_revc_vlb", &et4000w32p_revc_vlb_device },
{ "cl_gd5424_vlb", &gd5424_vlb_device },
{ "cl_gd5428_vlb", &gd5428_vlb_device },
{ "cl_gd5429_vlb", &gd5429_vlb_device },
{ "cl_gd5434_vlb", &gd5434_vlb_device },
{ "et4000w32p_vlb", &et4000w32p_cardex_vlb_device },
{ "stealth32_vlb", &et4000w32p_vlb_device },
{ "et4000w32p_nc_vlb", &et4000w32p_noncardex_vlb_device },
{ "cl_gd5424_vlb", &gd5424_vlb_device },
{ "cl_gd5426_vlb", &gd5426_vlb_device },
{ "cl_gd5430_vlb", &gd5430_vlb_device },
{ "cl_gd5428_vlb", &gd5428_vlb_device },
{ "cl_gd5428_diamond_b1_vlb", &gd5428_diamond_speedstar_pro_b1_vlb_device },
{ "cl_gd5429_vlb", &gd5429_vlb_device },
{ "cl_gd5430_vlb", &gd5430_diamond_speedstar_pro_se_a8_vlb_device },
{ "cl_gd5434_vlb", &gd5434_vlb_device },
{ "metheus928_vlb", &s3_metheus_86c928_vlb_device },
{ "mirocrystal8s_vlb", &s3_mirocrystal_8s_805_vlb_device },
{ "mirocrystal10sd_vlb", &s3_mirocrystal_10sd_805_vlb_device },

1
src/win/Makefile.mingw
View File

@@ -730,6 +730,7 @@ VIDOBJ := agpgart.o video.o \
vid_tvga.o \
vid_tgui9440.o vid_tkd8001_ramdac.o \
vid_att20c49x_ramdac.o \
vid_att2xc498_ramdac.o \
vid_s3.o vid_s3_virge.o \
vid_ibm_rgb528_ramdac.o vid_sdac_ramdac.o \
vid_ogc.o \