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Correct implementation of the VIA write-only NVR register 0D bit that is read from power management PCI register 42, fixes the FIC VA-503A.

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This commit is contained in:
OBattler
2021-08-09 07:19:12 +02:00
parent bfcc36ac8e
commit ee315970a1
2 changed files with 7 additions and 3 deletions
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5
src/chipset/via_pipc.c
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@@ -1122,9 +1122,8 @@ pipc_write(int func, int addr, uint8_t val, void *priv)
break;
case 0x42:
dev->power_regs[addr] &= ~0x2f;
dev->power_regs[addr] |= val & 0x2f;
acpi_set_irq_line(dev->acpi, dev->power_regs[addr]);
dev->power_regs[addr] = (dev->power_regs[addr] & 0xf0) | (val & 0x0f);
acpi_set_irq_line(dev->acpi, dev->power_regs[addr] & 0x0f);
break;
case 0x54:

5
src/nvr_at.c
View File

@@ -589,6 +589,9 @@ nvr_reg_write(uint16_t reg, uint8_t val, void *priv)
break;
case RTC_REGD: /* R/O */
/* This is needed for VIA, where writing to this register changes a write-only
bit whose value is read from power management register 42. */
nvr->regs[RTC_REGD] = val & 0x80;
break;
case 0x2e:
@@ -796,6 +799,8 @@ nvr_reset(nvr_t *nvr)
nvr->regs[RTC_YEAR] = RTC_BCD(80);
if (local->cent != 0xFF)
nvr->regs[local->cent] = RTC_BCD(19);
nvr->regs[RTC_REGD] = REGD_VRT;
}
/* Process after loading from file. */