busybox/scripts/Kbuild.include

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####
# kbuild: Generic definitions
# Convinient variables
comma := ,
squote := '
build system: remove KBUILD_STR() When using GNU Make >=4.3, the KBUILD_STR() definition interferes badly with dependency checks during build, and forces a complete rebuild every time Make runs. In if_changed_rule, Kconfig checks if the command used to build a file has changed since last execution. The previous command is stored in the generated .<file>.o.cmd file. For example applets/.applets.o.cmd defines a "cmd_applets/applets.o" variable: cmd_applets/applets.o := gcc ... -D"KBUILD_STR(s)=#s" ... Here the '#' should be escaped with a backslash, otherwise GNU Make interprets it as starting a comment, and ignore the rest of the variable. As a result of this truncation, the previous command doesn't equal the new command and Make rebuilds each target. The problem started to appear when GNU Make 4.3 (released January 2020), introduced a backward-incompatible fix to macros containing a '#'. While the above use of '#', a simple Make variable, still needs to be escaped, a '#' within a function invocation doesn't need to be escaped anymore. As Martin Dorey explained on the GNU Make discussion [1], the above declaration is generated from make-cmd, defined as: make-cmd = $(subst \#,\\\#,$(subst $$,$$$$,$(call escsq,$(cmd_$(1)))) Since GNU Make 4.3, the first argument of subst should not have a backslash. make-cmd now looks for literally \# and doesn't find it, and as a result doesn't add the backslash when generating .o.cmd files. [1] http://savannah.gnu.org/bugs/?20513 We could fix it by changing make-cmd to "$(subst #,\#,...)", but to avoid compatibility headaches, simply get rid of the KBUILD_STR definition, as done in Linux by b42841b7bb62 ("kbuild: Get rid of KBUILD_STR"). Quote the string arguments directly rather than asking the preprocessor to quote them. Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org> Signed-off-by: Denys Vlasenko <vda.linux@googlemail.com>
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quote := "
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empty :=
space := $(empty) $(empty)
###
# The temporary file to save gcc -MD generated dependencies must not
# contain a comma
depfile = $(subst $(comma),_,$(@D)/.$(@F).d)
###
# Escape single quote for use in echo statements
escsq = $(subst $(squote),'\$(squote)',$1)
###
# filechk is used to check if the content of a generated file is updated.
# Sample usage:
# define filechk_sample
# echo $KERNELRELEASE
# endef
# version.h : Makefile
# $(call filechk,sample)
# The rule defined shall write to stdout the content of the new file.
# The existing file will be compared with the new one.
# - If no file exist it is created
# - If the content differ the new file is used
# - If they are equal no change, and no timestamp update
# - stdin is piped in from the first prerequisite ($<) so one has
# to specify a valid file as first prerequisite (often the kbuild file)
define filechk
$(Q)set -e; \
echo ' CHK $@'; \
mkdir -p $(dir $@); \
$(filechk_$(1)) < $< > $@.tmp; \
if [ -r $@ ] && cmp -s $@ $@.tmp; then \
rm -f $@.tmp; \
else \
echo ' UPD $@'; \
mv -f $@.tmp $@; \
fi
endef
######
# gcc support functions
# See documentation in Documentation/kbuild/makefiles.txt
# as-option
# Usage: cflags-y += $(call as-option, -Wa$(comma)-isa=foo,)
as-option = $(shell if $(CC) $(CFLAGS) $(1) -Wa,-Z -c -o /dev/null \
-xassembler /dev/null > /dev/null 2>&1; then echo "$(1)"; \
else echo "$(2)"; fi ;)
# cc-option
# Usage: cflags-y += $(call cc-option, -march=winchip-c6, -march=i586)
cc-option = $(shell if $(CC) $(CFLAGS) $(1) -S -o /dev/null -xc /dev/null \
> /dev/null 2>&1; then echo "$(1)"; else echo "$(2)"; fi ;)
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# hostcc-option
# Usage: hostcflags-y += $(call hostcc-option, -march=winchip-c6, -march=i586)
hostcc-option = $(shell if $(HOSTCC) $(HOSTCFLAGS) $(1) -S -o /dev/null -xc /dev/null \
> /dev/null 2>&1; then echo "$(1)"; else echo "$(2)"; fi ;)
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# cc-option-yn
# Usage: flag := $(call cc-option-yn, -march=winchip-c6)
cc-option-yn = $(shell if $(CC) $(CFLAGS) $(1) -S -o /dev/null -xc /dev/null \
> /dev/null 2>&1; then echo "y"; else echo "n"; fi;)
# cc-option-align
# Prefix align with either -falign or -malign
cc-option-align = $(subst -functions=0,,\
$(call cc-option,-falign-functions=0,-malign-functions=0))
# cc-version
# Usage gcc-ver := $(call cc-version, $(CC))
cc-version = $(shell PATH="$(PATH)" $(CONFIG_SHELL) $(srctree)/scripts/gcc-version.sh \
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$(if $(1), $(1), $(CC)))
# cc-ifversion
# Usage: EXTRA_CFLAGS += $(call cc-ifversion, -lt, 0402, -O1)
cc-ifversion = $(shell if [ $(call cc-version, $(CC)) $(1) $(2) ]; then \
echo $(3); fi;)
###
# Shorthand for $(Q)$(MAKE) -f scripts/Makefile.build obj=
# Usage:
# $(Q)$(MAKE) $(build)=dir
build := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build obj
# Prefix -I with $(srctree) if it is not an absolute path
addtree = $(if $(filter-out -I/%,$(1)),$(patsubst -I%,-I$(srctree)/%,$(1))) $(1)
# Find all -I options and call addtree
flags = $(foreach o,$($(1)),$(if $(filter -I%,$(o)),$(call addtree,$(o)),$(o)))
# If quiet is set, only print short version of command
cmd = @$(echo-cmd) $(cmd_$(1))
# Add $(obj)/ for paths that is not absolute
objectify = $(foreach o,$(1),$(if $(filter /%,$(o)),$(o),$(obj)/$(o)))
###
# if_changed - execute command if any prerequisite is newer than
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# target, or command line has changed
# if_changed_dep - as if_changed, but uses fixdep to reveal dependencies
# including used config symbols
# if_changed_rule - as if_changed but execute rule instead
# See Documentation/kbuild/makefiles.txt for more info
ifneq ($(KBUILD_NOCMDDEP),1)
# Check if both arguments has same arguments. Result in empty string if equal
# User may override this check using make KBUILD_NOCMDDEP=1
arg-check = $(strip $(filter-out $(1), $(2)) $(filter-out $(2), $(1)) )
endif
# echo command. Short version is $(quiet) equals quiet, otherwise full command
echo-cmd = $(if $($(quiet)cmd_$(1)), \
echo ' $(call escsq,$($(quiet)cmd_$(1)))';)
make-cmd = $(subst \#,\\\#,$(subst $$,$$$$,$(call escsq,$(cmd_$(1)))))
# function to only execute the passed command if necessary
# >'< substitution is for echo to work, >$< substitution to preserve $ when reloading .cmd file
# note: when using inline perl scripts [perl -e '...$$t=1;...'] in $(cmd_xxx) double $$ your perl vars
#
if_changed = $(if $(strip $(filter-out $(PHONY),$?) \
$(call arg-check, $(cmd_$(1)), $(cmd_$@)) ), \
@set -e; \
$(echo-cmd) $(cmd_$(1)); \
echo 'cmd_$@ := $(make-cmd)' > $(@D)/.$(@F).cmd)
# execute the command and also postprocess generated .d dependencies
# file
if_changed_dep = $(if $(strip $(filter-out $(PHONY),$?) \
$(filter-out FORCE $(wildcard $^),$^) \
$(call arg-check, $(cmd_$(1)), $(cmd_$@)) ), \
@set -e; \
$(echo-cmd) $(cmd_$(1)); \
scripts/basic/fixdep $(depfile) $@ '$(make-cmd)' > $(@D)/.$(@F).tmp; \
rm -f $(depfile); \
mv -f $(@D)/.$(@F).tmp $(@D)/.$(@F).cmd)
# Usage: $(call if_changed_rule,foo)
# will check if $(cmd_foo) changed, or any of the prequisites changed,
# and if so will execute $(rule_foo)
if_changed_rule = $(if $(strip $(filter-out $(PHONY),$?) \
$(call arg-check, $(cmd_$(1)), $(cmd_$@)) ),\
@set -e; \
$(rule_$(1)))