ed8af51b60
When using GNU Make >=4.3, the KBUILD_STR() definition interferes badly with dependency checks during build, and forces a complete rebuild every time Make runs. In if_changed_rule, Kconfig checks if the command used to build a file has changed since last execution. The previous command is stored in the generated .<file>.o.cmd file. For example applets/.applets.o.cmd defines a "cmd_applets/applets.o" variable: cmd_applets/applets.o := gcc ... -D"KBUILD_STR(s)=#s" ... Here the '#' should be escaped with a backslash, otherwise GNU Make interprets it as starting a comment, and ignore the rest of the variable. As a result of this truncation, the previous command doesn't equal the new command and Make rebuilds each target. The problem started to appear when GNU Make 4.3 (released January 2020), introduced a backward-incompatible fix to macros containing a '#'. While the above use of '#', a simple Make variable, still needs to be escaped, a '#' within a function invocation doesn't need to be escaped anymore. As Martin Dorey explained on the GNU Make discussion [1], the above declaration is generated from make-cmd, defined as: make-cmd = $(subst \#,\\\#,$(subst $$,$$$$,$(call escsq,$(cmd_$(1)))) Since GNU Make 4.3, the first argument of subst should not have a backslash. make-cmd now looks for literally \# and doesn't find it, and as a result doesn't add the backslash when generating .o.cmd files. [1] http://savannah.gnu.org/bugs/?20513 We could fix it by changing make-cmd to "$(subst #,\#,...)", but to avoid compatibility headaches, simply get rid of the KBUILD_STR definition, as done in Linux by b42841b7bb62 ("kbuild: Get rid of KBUILD_STR"). Quote the string arguments directly rather than asking the preprocessor to quote them. Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org> Signed-off-by: Denys Vlasenko <vda.linux@googlemail.com>
156 lines
5.3 KiB
Plaintext
156 lines
5.3 KiB
Plaintext
####
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# kbuild: Generic definitions
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# Convinient variables
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comma := ,
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squote := '
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quote := "
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empty :=
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space := $(empty) $(empty)
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###
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# The temporary file to save gcc -MD generated dependencies must not
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# contain a comma
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depfile = $(subst $(comma),_,$(@D)/.$(@F).d)
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###
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# Escape single quote for use in echo statements
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escsq = $(subst $(squote),'\$(squote)',$1)
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###
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# filechk is used to check if the content of a generated file is updated.
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# Sample usage:
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# define filechk_sample
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# echo $KERNELRELEASE
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# endef
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# version.h : Makefile
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# $(call filechk,sample)
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# The rule defined shall write to stdout the content of the new file.
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# The existing file will be compared with the new one.
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# - If no file exist it is created
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# - If the content differ the new file is used
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# - If they are equal no change, and no timestamp update
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# - stdin is piped in from the first prerequisite ($<) so one has
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# to specify a valid file as first prerequisite (often the kbuild file)
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define filechk
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$(Q)set -e; \
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echo ' CHK $@'; \
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mkdir -p $(dir $@); \
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$(filechk_$(1)) < $< > $@.tmp; \
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if [ -r $@ ] && cmp -s $@ $@.tmp; then \
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rm -f $@.tmp; \
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else \
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echo ' UPD $@'; \
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mv -f $@.tmp $@; \
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fi
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endef
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######
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# gcc support functions
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# See documentation in Documentation/kbuild/makefiles.txt
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# as-option
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# Usage: cflags-y += $(call as-option, -Wa$(comma)-isa=foo,)
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as-option = $(shell if $(CC) $(CFLAGS) $(1) -Wa,-Z -c -o /dev/null \
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-xassembler /dev/null > /dev/null 2>&1; then echo "$(1)"; \
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else echo "$(2)"; fi ;)
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# cc-option
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# Usage: cflags-y += $(call cc-option, -march=winchip-c6, -march=i586)
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cc-option = $(shell if $(CC) $(CFLAGS) $(1) -S -o /dev/null -xc /dev/null \
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> /dev/null 2>&1; then echo "$(1)"; else echo "$(2)"; fi ;)
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# hostcc-option
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# Usage: hostcflags-y += $(call hostcc-option, -march=winchip-c6, -march=i586)
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hostcc-option = $(shell if $(HOSTCC) $(HOSTCFLAGS) $(1) -S -o /dev/null -xc /dev/null \
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> /dev/null 2>&1; then echo "$(1)"; else echo "$(2)"; fi ;)
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# cc-option-yn
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# Usage: flag := $(call cc-option-yn, -march=winchip-c6)
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cc-option-yn = $(shell if $(CC) $(CFLAGS) $(1) -S -o /dev/null -xc /dev/null \
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> /dev/null 2>&1; then echo "y"; else echo "n"; fi;)
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# cc-option-align
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# Prefix align with either -falign or -malign
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cc-option-align = $(subst -functions=0,,\
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$(call cc-option,-falign-functions=0,-malign-functions=0))
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# cc-version
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# Usage gcc-ver := $(call cc-version, $(CC))
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cc-version = $(shell PATH="$(PATH)" $(CONFIG_SHELL) $(srctree)/scripts/gcc-version.sh \
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$(if $(1), $(1), $(CC)))
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# cc-ifversion
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# Usage: EXTRA_CFLAGS += $(call cc-ifversion, -lt, 0402, -O1)
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cc-ifversion = $(shell if [ $(call cc-version, $(CC)) $(1) $(2) ]; then \
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echo $(3); fi;)
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###
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# Shorthand for $(Q)$(MAKE) -f scripts/Makefile.build obj=
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# Usage:
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# $(Q)$(MAKE) $(build)=dir
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build := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build obj
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# Prefix -I with $(srctree) if it is not an absolute path
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addtree = $(if $(filter-out -I/%,$(1)),$(patsubst -I%,-I$(srctree)/%,$(1))) $(1)
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# Find all -I options and call addtree
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flags = $(foreach o,$($(1)),$(if $(filter -I%,$(o)),$(call addtree,$(o)),$(o)))
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# If quiet is set, only print short version of command
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cmd = @$(echo-cmd) $(cmd_$(1))
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# Add $(obj)/ for paths that is not absolute
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objectify = $(foreach o,$(1),$(if $(filter /%,$(o)),$(o),$(obj)/$(o)))
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###
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# if_changed - execute command if any prerequisite is newer than
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# target, or command line has changed
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# if_changed_dep - as if_changed, but uses fixdep to reveal dependencies
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# including used config symbols
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# if_changed_rule - as if_changed but execute rule instead
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# See Documentation/kbuild/makefiles.txt for more info
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ifneq ($(KBUILD_NOCMDDEP),1)
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# Check if both arguments has same arguments. Result in empty string if equal
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# User may override this check using make KBUILD_NOCMDDEP=1
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arg-check = $(strip $(filter-out $(1), $(2)) $(filter-out $(2), $(1)) )
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endif
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# echo command. Short version is $(quiet) equals quiet, otherwise full command
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echo-cmd = $(if $($(quiet)cmd_$(1)), \
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echo ' $(call escsq,$($(quiet)cmd_$(1)))';)
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make-cmd = $(subst \#,\\\#,$(subst $$,$$$$,$(call escsq,$(cmd_$(1)))))
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# function to only execute the passed command if necessary
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# >'< substitution is for echo to work, >$< substitution to preserve $ when reloading .cmd file
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# note: when using inline perl scripts [perl -e '...$$t=1;...'] in $(cmd_xxx) double $$ your perl vars
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#
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if_changed = $(if $(strip $(filter-out $(PHONY),$?) \
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$(call arg-check, $(cmd_$(1)), $(cmd_$@)) ), \
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@set -e; \
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$(echo-cmd) $(cmd_$(1)); \
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echo 'cmd_$@ := $(make-cmd)' > $(@D)/.$(@F).cmd)
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# execute the command and also postprocess generated .d dependencies
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# file
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if_changed_dep = $(if $(strip $(filter-out $(PHONY),$?) \
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$(filter-out FORCE $(wildcard $^),$^) \
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$(call arg-check, $(cmd_$(1)), $(cmd_$@)) ), \
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@set -e; \
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$(echo-cmd) $(cmd_$(1)); \
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scripts/basic/fixdep $(depfile) $@ '$(make-cmd)' > $(@D)/.$(@F).tmp; \
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rm -f $(depfile); \
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mv -f $(@D)/.$(@F).tmp $(@D)/.$(@F).cmd)
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# Usage: $(call if_changed_rule,foo)
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# will check if $(cmd_foo) changed, or any of the prequisites changed,
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# and if so will execute $(rule_foo)
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if_changed_rule = $(if $(strip $(filter-out $(PHONY),$?) \
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$(call arg-check, $(cmd_$(1)), $(cmd_$@)) ),\
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@set -e; \
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$(rule_$(1)))
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