More fixes as per PR feedback.
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@ -147,7 +147,7 @@ void ARM_DynCom::ExecuteInstructions(u64 num_instructions) {
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state->NumInstrsToExecute = num_instructions;
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unsigned ticks_executed = InterpreterMainLoop(state.get());
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CoreTiming::AddTicks(ticks_executed);
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state.get()->ServeBreak();
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state->ServeBreak();
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}
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std::unique_ptr<ARM_Interface::ThreadContext> ARM_DynCom::NewContext() const {
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@ -597,16 +597,18 @@ void ARMul_State::WriteCP15Register(u32 value, u32 crn, u32 opcode_1, u32 crm, u
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}
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void ARMul_State::ServeBreak() {
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if (GDBStub::IsServerEnabled()) {
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if (last_bkpt_hit) {
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Reg[15] = last_bkpt.address;
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}
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Kernel::Thread* thread = Kernel::GetCurrentThread();
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Core::CPU().SaveContext(thread->context);
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if (last_bkpt_hit || GDBStub::GetCpuStepFlag()) {
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last_bkpt_hit = false;
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GDBStub::Break();
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GDBStub::SendTrap(thread, 5);
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}
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if (!GDBStub::IsServerEnabled()) {
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return;
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}
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if (last_bkpt_hit) {
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Reg[15] = last_bkpt.address;
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}
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Kernel::Thread* thread = Kernel::GetCurrentThread();
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Core::CPU().SaveContext(thread->context);
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if (last_bkpt_hit || GDBStub::GetCpuStepFlag()) {
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last_bkpt_hit = false;
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GDBStub::Break();
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GDBStub::SendTrap(thread, 5);
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}
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}
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@ -215,8 +215,8 @@ static void FpuWrite(std::size_t id, u64 val, Kernel::Thread* thread = nullptr)
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}
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if (id >= D0_REGISTER && id < FPSCR_REGISTER) {
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thread->context->SetFpuRegister(2 * (id - D0_REGISTER), (u32)val);
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thread->context->SetFpuRegister(2 * (id - D0_REGISTER) + 1, val >> 32);
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thread->context->SetFpuRegister(2 * (id - D0_REGISTER), static_cast<u32>(val));
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thread->context->SetFpuRegister(2 * (id - D0_REGISTER) + 1, static_cast<u32>(val >> 32));
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} else if (id == FPSCR_REGISTER) {
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return thread->context->SetFpscr(static_cast<u32>(val));
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}
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