tls: P256: tweak arm assembly (currently disabled)
Signed-off-by: Denys Vlasenko <vda.linux@googlemail.com>
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@ -393,7 +393,7 @@ static void sp_256_mul_8(sp_digit* r, const sp_digit* a, const sp_digit* b)
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"\n subs r3, r5, #28"
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"\n movcc r3, #0"
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"\n sub r4, r5, r3"
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"\n 2:"
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"\n 2:"
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"\n ldr r14, [%[a], r3]"
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"\n ldr r12, [%[b], r4]"
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"\n umull r9, r10, r14, r12"
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@ -416,7 +416,7 @@ static void sp_256_mul_8(sp_digit* r, const sp_digit* a, const sp_digit* b)
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"\n ble 1b"
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"\n str r6, [%[r], r5]"
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: [r] "r" (tmp), [a] "r" (a), [b] "r" (b)
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: "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r14", "r12"
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: "memory", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r12", "r14"
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);
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memcpy(r, tmp, sizeof(tmp));
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#else
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@ -732,97 +732,98 @@ static void sp_256_mont_reduce_8(sp_digit* a, sp_digit* m, sp_digit mp)
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asm volatile (
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# i = 0
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mov r12, #0 # i = 0
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ldr r10, [%[a], #0] # r10 = a[0]
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ldr r14, [%[a], #4] # r14 = a[1]
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mov r12, #0
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ldr r10, [%[a], #0]
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ldr r14, [%[a], #4]
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1:
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# mu = a[i] * mp #
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mul r8, %[mp], r10 # mu = a[i] * mp
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# a[i+0] += m[0] * mu #
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ldr r7, [%[m], #0] # a[i+0] += m[0] * mu
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ldr r9, [%[a], #0] #
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umull r6, r7, r8, r7 # r7:r6 = mu * m[0]
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adds r10, r10, r6 # r5:r10 += r7:r6
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adc r5, r7, #0 #
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# a[i+1] += m[1] * mu #
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ldr r7, [%[m], #4] # a[i+1] += m[1] * mu
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ldr r9, [%[a], #4] #
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umull r6, r7, r8, r7 # r7:r6 = mu * m[1]
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adds r10, r14, r6 # r4:r10 = r7:r14 + r7:r6
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adc r4, r7, #0 #
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adds r10, r10, r5 # r4:r10 += r5
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adc r4, r4, #0 #
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# a[i+2] += m[2] * mu #
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ldr r7, [%[m], #8] # a[i+2] += m[2] * mu
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ldr r14, [%[a], #8] #
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umull r6, r7, r8, r7 #
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adds r14, r14, r6 #
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adc r5, r7, #0 #
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adds r14, r14, r4 #
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adc r5, r5, #0 #
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# a[i+3] += m[3] * mu #
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ldr r7, [%[m], #12] # a[i+3] += m[3] * mu
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ldr r9, [%[a], #12] #
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umull r6, r7, r8, r7 #
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adds r9, r9, r6 #
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adc r4, r7, #0 #
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adds r9, r9, r5 #
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str r9, [%[a], #12] # a[3] = r9
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adc r4, r4, #0 #
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# a[i+4] += m[4] * mu #
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ldr r7, [%[m], #16] # a[i+4] += m[4] * mu
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ldr r9, [%[a], #16] #
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umull r6, r7, r8, r7 #
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adds r9, r9, r6 #
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adc r5, r7, #0 #
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adds r9, r9, r4 #
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str r9, [%[a], #16] # a[4] = r9
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adc r5, r5, #0 #
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# a[i+5] += m[5] * mu #
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ldr r7, [%[m], #20] # a[i+5] += m[5] * mu
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ldr r9, [%[a], #20] #
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umull r6, r7, r8, r7 #
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adds r9, r9, r6 #
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adc r4, r7, #0 #
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adds r9, r9, r5 #
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str r9, [%[a], #20] # a[5] = r9
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adc r4, r4, #0 #
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# a[i+6] += m[6] * mu #
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ldr r7, [%[m], #24] # a[i+6] += m[6] * mu
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ldr r9, [%[a], #24] #
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umull r6, r7, r8, r7 #
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adds r9, r9, r6 #
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adc r5, r7, #0 #
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adds r9, r9, r4 #
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str r9, [%[a], #24] # a[6] = r9
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adc r5, r5, #0 #
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# a[i+7] += m[7] * mu #
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ldr r7, [%[m], #28] # a[i+7] += m[7] * mu
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ldr r9, [%[a], #28] #
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umull r6, r7, r8, r7 #
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adds r5, r5, r6 #
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adcs r7, r7, %[ca] #
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mov %[ca], #0 #
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adc %[ca], %[ca], %[ca] # ca = CF
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adds r9, r9, r5 #
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str r9, [%[a], #28] # a[7] = r9
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ldr r9, [%[a], #32] # r9 = a[8]
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adcs r9, r9, r7 #
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str r9, [%[a], #32] # a[8] = r9
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adc %[ca], %[ca], #0 # ca += CF
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# i += 1 # i++
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add %[a], %[a], #4 # a++
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add r12, r12, #4 # i += 4
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cmp r12, #32 # if (i < 32)
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blt 1b # goto 1
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# mu = a[i] * mp
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mul r8, %[mp], r10
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# a[i+0] += m[0] * mu
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ldr r7, [%[m], #0]
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ldr r9, [%[a], #0]
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umull r6, r7, r8, r7
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adds r10, r10, r6
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adc r5, r7, #0
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# a[i+1] += m[1] * mu
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ldr r7, [%[m], #4]
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ldr r9, [%[a], #4]
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umull r6, r7, r8, r7
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adds r10, r14, r6
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adc r4, r7, #0
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adds r10, r10, r5
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adc r4, r4, #0
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# a[i+2] += m[2] * mu
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ldr r7, [%[m], #8]
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ldr r14, [%[a], #8]
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umull r6, r7, r8, r7
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adds r14, r14, r6
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adc r5, r7, #0
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adds r14, r14, r4
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adc r5, r5, #0
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# a[i+3] += m[3] * mu
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ldr r7, [%[m], #12]
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ldr r9, [%[a], #12]
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umull r6, r7, r8, r7
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adds r9, r9, r6
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adc r4, r7, #0
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adds r9, r9, r5
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str r9, [%[a], #12]
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adc r4, r4, #0
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# a[i+4] += m[4] * mu
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ldr r7, [%[m], #16]
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ldr r9, [%[a], #16]
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umull r6, r7, r8, r7
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adds r9, r9, r6
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adc r5, r7, #0
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adds r9, r9, r4
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str r9, [%[a], #16]
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adc r5, r5, #0
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# a[i+5] += m[5] * mu
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ldr r7, [%[m], #20]
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ldr r9, [%[a], #20]
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umull r6, r7, r8, r7
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adds r9, r9, r6
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adc r4, r7, #0
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adds r9, r9, r5
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str r9, [%[a], #20]
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adc r4, r4, #0
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# a[i+6] += m[6] * mu
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ldr r7, [%[m], #24]
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ldr r9, [%[a], #24]
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umull r6, r7, r8, r7
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adds r9, r9, r6
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adc r5, r7, #0
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adds r9, r9, r4
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str r9, [%[a], #24]
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adc r5, r5, #0
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# a[i+7] += m[7] * mu
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ldr r7, [%[m], #28]
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ldr r9, [%[a], #28]
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umull r6, r7, r8, r7
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adds r5, r5, r6
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adcs r7, r7, %[ca]
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mov %[ca], #0
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adc %[ca], %[ca], %[ca]
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adds r9, r9, r5
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str r9, [%[a], #28]
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ldr r9, [%[a], #32]
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adcs r9, r9, r7
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str r9, [%[a], #32]
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adc %[ca], %[ca], #0
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# i += 1
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add %[a], %[a], #4
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add r12, r12, #4
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cmp r12, #32
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blt 1b
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str r10, [%[a], #0] # a[0] = r10
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str r14, [%[a], #4] # a[1] = r14
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str r10, [%[a], #0]
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str r14, [%[a], #4]
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: [ca] "+r" (ca), [a] "+r" (a)
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: [m] "r" (m), [mp] "r" (mp)
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: "memory", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r14", "r12"
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: "memory", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r12", "r14"
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);
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memcpy(a, a + 8, 32);
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if (ca)
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a -= m;
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}
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