tls: P256: x86-64 optimized sp_256_sub_8_p256_mod
function old new delta sp_256_sub_8_p256_mod - 53 +53 sp_256_mont_reduce_8 223 217 -6 sp_256_mont_dbl_8 38 32 -6 sp_256_ecc_mulmod_8 1535 1529 -6 sp_256_proj_point_dbl_8 469 454 -15 ------------------------------------------------------------------------------ (add/remove: 1/0 grow/shrink: 0/4 up/down: 53/-33) Total: 20 bytes Signed-off-by: Denys Vlasenko <vda.linux@googlemail.com>
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@ -346,8 +346,8 @@ static int sp_256_sub_8(sp_digit* r, const sp_digit* a, const sp_digit* b)
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#endif
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}
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#if ALLOW_ASM && defined(__GNUC__) && defined(__i386__)
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/* Sub p256_mod from a into r. (r = a - p256_mod). */
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#if ALLOW_ASM && defined(__GNUC__) && defined(__i386__)
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static void sp_256_sub_8_p256_mod(sp_digit* r, const sp_digit* a)
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{
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sp_digit reg;
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@ -390,6 +390,36 @@ static void sp_256_sub_8_p256_mod(sp_digit* r, const sp_digit* a)
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: "memory"
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);
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}
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#elif ALLOW_ASM && defined(__GNUC__) && defined(__x86_64__)
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static void sp_256_sub_8_p256_mod(sp_digit* r, const sp_digit* a)
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{
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uint64_t reg;
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uint64_t ooff;
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//p256_mod[3..0] = ffffffff00000001 0000000000000000 00000000ffffffff ffffffffffffffff
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asm volatile (
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"\n movq (%0), %3"
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"\n addq $1, %3" // adding 1 is the same as subtracting ffffffffffffffff
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"\n movq %3, (%1)" //
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"\n cmc" // only carry bit needs inverting
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"\n"
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"\n movq 1*8(%0), %3"
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"\n sbbq %2, %3" // %2 holds 00000000ffffffff
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"\n movq %3, 1*8(%1)"
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"\n"
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"\n movq 2*8(%0), %3"
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"\n sbbq $0, %3"
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"\n movq %3, 2*8(%1)"
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"\n"
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"\n movq 3*8(%0), %3"
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"\n sbbq $0, %3" // adding 00000000ffffffff (in %2)
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"\n addq %2, %3" // is the same as subtracting ffffffff00000001
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"\n movq %3, 3*8(%1)"
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"\n"
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: "=r" (a), "=r" (r), "=r" (ooff), "=r" (reg)
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: "0" (a), "1" (r), "2" (0x00000000ffffffff)
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: "memory"
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);
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}
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#else
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# define sp_256_sub_8_p256_mod(r, a) sp_256_sub_8((r), (a), p256_mod)
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#endif
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