tls: P256: sp_256_sub_8_p256_mod always subtracts in-place, use that
i386: function old new delta sp_256_mont_reduce_8 245 243 -2 sp_256_mont_dbl_8 26 24 -2 sp_256_ecc_mulmod_8 1161 1157 -4 sp_256_proj_point_dbl_8 359 353 -6 sp_256_sub_8_p256_mod 71 32 -39 ------------------------------------------------------------------------------ (add/remove: 0/0 grow/shrink: 0/5 up/down: 0/-53) Total: -53 bytes non-asm code: function old new delta sp_256_sub_8_p256_mod - 12 +12 sp_256_mont_reduce_8 250 243 -7 sp_256_mont_dbl_8 31 24 -7 sp_256_ecc_mulmod_8 1171 1157 -14 sp_256_proj_point_dbl_8 374 353 -21 ------------------------------------------------------------------------------ (add/remove: 1/0 grow/shrink: 0/4 up/down: 12/-49) Total: -37 bytes Signed-off-by: Denys Vlasenko <vda.linux@googlemail.com>
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@ -346,82 +346,55 @@ static int sp_256_sub_8(sp_digit* r, const sp_digit* a, const sp_digit* b)
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#endif
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}
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/* Sub p256_mod from a into r. (r = a - p256_mod). */
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/* Sub p256_mod from r. (r = r - p256_mod). */
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#if ALLOW_ASM && defined(__GNUC__) && defined(__i386__)
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static void sp_256_sub_8_p256_mod(sp_digit* r, const sp_digit* a)
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static void sp_256_sub_8_p256_mod(sp_digit* r)
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{
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sp_digit reg;
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//p256_mod[7..0] = ffffffff 00000001 00000000 00000000 00000000 ffffffff ffffffff ffffffff
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asm volatile (
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"\n movl (%0), %2"
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"\n subl $0xffffffff, %2"
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"\n movl %2, (%1)"
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"\n subl $0xffffffff, (%0)"
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"\n sbbl $0xffffffff, 1*4(%0)"
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"\n sbbl $0xffffffff, 2*4(%0)"
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"\n sbbl $0, 3*4(%0)"
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"\n sbbl $0, 4*4(%0)"
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"\n sbbl $0, 5*4(%0)"
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"\n sbbl $1, 6*4(%0)"
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"\n sbbl $0xffffffff, 7*4(%0)"
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"\n"
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"\n movl 1*4(%0), %2"
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"\n sbbl $0xffffffff, %2"
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"\n movl %2, 1*4(%1)"
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"\n"
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"\n movl 2*4(%0), %2"
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"\n sbbl $0xffffffff, %2"
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"\n movl %2, 2*4(%1)"
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"\n"
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"\n movl 3*4(%0), %2"
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"\n sbbl $0, %2"
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"\n movl %2, 3*4(%1)"
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"\n"
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"\n movl 4*4(%0), %2"
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"\n sbbl $0, %2"
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"\n movl %2, 4*4(%1)"
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"\n"
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"\n movl 5*4(%0), %2"
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"\n sbbl $0, %2"
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"\n movl %2, 5*4(%1)"
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"\n"
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"\n movl 6*4(%0), %2"
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"\n sbbl $1, %2"
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"\n movl %2, 6*4(%1)"
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"\n"
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"\n movl 7*4(%0), %2"
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"\n sbbl $0xffffffff, %2"
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"\n movl %2, 7*4(%1)"
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"\n"
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: "=r" (a), "=r" (r), "=r" (reg)
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: "0" (a), "1" (r)
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: "=r" (r)
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: "0" (r)
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: "memory"
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);
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}
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#elif ALLOW_ASM && defined(__GNUC__) && defined(__x86_64__)
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static void sp_256_sub_8_p256_mod(sp_digit* r, const sp_digit* a)
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static void sp_256_sub_8_p256_mod(sp_digit* r)
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{
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uint64_t reg;
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uint64_t ooff;
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//p256_mod[3..0] = ffffffff00000001 0000000000000000 00000000ffffffff ffffffffffffffff
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asm volatile (
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"\n movq (%0), %3"
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"\n addq $1, %3" // adding 1 is the same as subtracting ffffffffffffffff
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"\n movq %3, (%1)" //
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"\n addq $1, (%0)" // adding 1 is the same as subtracting ffffffffffffffff
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"\n cmc" // only carry bit needs inverting
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"\n sbbq %1, 1*8(%0)" // %1 holds 00000000ffffffff
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"\n sbbq $0, 2*8(%0)"
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"\n"
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"\n movq 1*8(%0), %3"
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"\n sbbq %2, %3" // %2 holds 00000000ffffffff
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"\n movq %3, 1*8(%1)"
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"\n movq 3*8(%0), %2"
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"\n sbbq $0, %2" // adding 00000000ffffffff (in %1)
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"\n addq %1, %2" // is the same as subtracting ffffffff00000001
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"\n movq %2, 3*8(%0)"
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"\n"
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"\n movq 2*8(%0), %3"
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"\n sbbq $0, %3"
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"\n movq %3, 2*8(%1)"
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"\n"
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"\n movq 3*8(%0), %3"
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"\n sbbq $0, %3" // adding 00000000ffffffff (in %2)
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"\n addq %2, %3" // is the same as subtracting ffffffff00000001
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"\n movq %3, 3*8(%1)"
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"\n"
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: "=r" (a), "=r" (r), "=r" (ooff), "=r" (reg)
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: "0" (a), "1" (r), "2" (0x00000000ffffffff)
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: "=r" (r), "=r" (ooff), "=r" (reg)
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: "0" (r), "1" (0x00000000ffffffff)
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: "memory"
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);
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}
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#else
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# define sp_256_sub_8_p256_mod(r, a) sp_256_sub_8((r), (a), p256_mod)
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static void sp_256_sub_8_p256_mod(sp_digit* r)
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{
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sp_256_sub_8(r, r, p256_mod);
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}
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#endif
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/* Multiply a and b into r. (r = a * b) */
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@ -609,7 +582,7 @@ static void sp_256_mont_add_8(sp_digit* r, const sp_digit* a, const sp_digit* b
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int carry = sp_256_add_8(r, a, b);
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sp_256_norm_8(r);
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if (carry) {
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sp_256_sub_8_p256_mod(r, r /*, m*/);
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sp_256_sub_8_p256_mod(r);
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sp_256_norm_8(r);
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}
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}
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@ -637,7 +610,7 @@ static void sp_256_mont_dbl_8(sp_digit* r, const sp_digit* a /*, const sp_digit*
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int carry = sp_256_add_8(r, a, a);
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sp_256_norm_8(r);
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if (carry)
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sp_256_sub_8_p256_mod(r, r /*, m*/);
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sp_256_sub_8_p256_mod(r);
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sp_256_norm_8(r);
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}
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@ -649,13 +622,13 @@ static void sp_256_mont_tpl_8(sp_digit* r, const sp_digit* a /*, const sp_digit*
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int carry = sp_256_add_8(r, a, a);
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sp_256_norm_8(r);
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if (carry) {
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sp_256_sub_8_p256_mod(r, r /*, m*/);
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sp_256_sub_8_p256_mod(r);
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sp_256_norm_8(r);
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}
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carry = sp_256_add_8(r, r, a);
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sp_256_norm_8(r);
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if (carry) {
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sp_256_sub_8_p256_mod(r, r /*, m*/);
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sp_256_sub_8_p256_mod(r);
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sp_256_norm_8(r);
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}
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}
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@ -829,7 +802,7 @@ static void sp_256_mont_reduce_8(sp_digit* a/*, const sp_digit* m, sp_digit mp*/
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}
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sp_256_mont_shift_8(a, a);
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if (word16th != 0)
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sp_256_sub_8_p256_mod(a, a /*, m*/);
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sp_256_sub_8_p256_mod(a);
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sp_256_norm_8(a);
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}
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else { /* Same code for explicit mp == 1 (which is always the case for P256) */
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@ -849,7 +822,7 @@ static void sp_256_mont_reduce_8(sp_digit* a/*, const sp_digit* m, sp_digit mp*/
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}
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sp_256_mont_shift_8(a, a);
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if (word16th != 0)
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sp_256_sub_8_p256_mod(a, a /*, m*/);
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sp_256_sub_8_p256_mod(a);
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sp_256_norm_8(a);
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}
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}
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@ -1104,7 +1077,7 @@ static void sp_256_map_8(sp_point* r, sp_point* p)
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sp_256_mont_reduce_8(r->x /*, p256_mod, p256_mp_mod*/);
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/* Reduce x to less than modulus */
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if (sp_256_cmp_8(r->x, p256_mod) >= 0)
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sp_256_sub_8_p256_mod(r->x, r->x /*, p256_mod*/);
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sp_256_sub_8_p256_mod(r->x);
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sp_256_norm_8(r->x);
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/* y /= z^3 */
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@ -1113,7 +1086,7 @@ static void sp_256_map_8(sp_point* r, sp_point* p)
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sp_256_mont_reduce_8(r->y /*, p256_mod, p256_mp_mod*/);
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/* Reduce y to less than modulus */
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if (sp_256_cmp_8(r->y, p256_mod) >= 0)
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sp_256_sub_8_p256_mod(r->y, r->y /*, p256_mod*/);
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sp_256_sub_8_p256_mod(r->y);
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sp_256_norm_8(r->y);
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memset(r->z, 0, sizeof(r->z));
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